MC100EP56 데이터 시트보기 (PDF) - ON Semiconductor
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MC100EP56 Datasheet PDF : 11 Pages
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MC10EP56, MC100EP56
VCC Q0
20 19
Q0 SEL0
SEL1 VCC Q1 Q1 VEE
18 17 16 15 14 13 12 11
1
0
1
0
1
2
3
4
5
6
7
8
9 10
D0a D0a VBBO D0b D0b D1a D1a VBB1 D1b D1b
Warning: All VCC and VEE pins must be externally connected
to Power Supply to guarantee proper operation.
Figure 1. 20−Lead Package (Top View) and Logic Diagram
Table 1. PIN DESCRIPTION
PIN
FUNCTION
D0a* − D1a*
ECL Input Data a
D0a* − D1a*
D0b* − D1b*
ECL Input Data a Invert
ECL Input Data b
D0b* − D1b*
ECL Input Data b Invert
SEL0* − SEL1* ECL Indiv. Select Input
COM_SEL*
ECL Common Select Input
VBB0, VBB1
Q0 − Q1
Q0 − Q1
Output Reference Voltage
ECL True Outputs
ECL Inverted Outputs
VCC
Positive Supply
VEE
Negative Supply
EP
Exposed Pad
* Pins will default LOW when left open.
Table 2. TRUTH TABLE
Q0,
Q1,
SEL0 SEL1 COM_SEL Q0
Q1
X
X
L
L
L
H
H
H
H
L
H
a
a
L
b
b
L
b
a
L
a
a
L
a
b
D0a D0a VCC Q0 Q0
20 19 18 17 16
Exposed Pad
VBB0 1
D0b 2
D0b 3
D1a 4
D1a 5
MC10/100EP56
15 SEL0
14 COM_SEL
13 SEL1
12 VCC
11 Q1
6
7 8 9 10
NOTE:
VBB1 D1b D1b VEE Q1
The Exposed Pad (EP) on package bottom must be attached to a heat−sinking conduit.
The Exposed Pad may only be electrically connected to VEE.
Figure 1. QFN−20 Pinout (Top View)
http://onsemi.com
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