MC1494 데이터 시트보기 (PDF) - ON Semiconductor

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MC1494

Linear Four-Quadrant Multiplier

ON Semiconductor 

MC1494

The offset voltage then existing at the output will be equal

to the offset current times the load resistance. The output

offset current of the MC1494 is typically 17 µA and 35 µA

maximum. Thus, the maximum output offset would be about

160 mV.

Bandwidth

The bandwidth of the MC1494 is primarily determined by

two factors. First, the dominant pole will be determined by

the load resistor and the stray capacitance at the output

terminal. For the circuit shown in Figure 19, assuming a total

output capacitance (CO) of 10 pF, the 3.0 dB bandwidth

would be approximately 3.4 MHz. If the load resistor were

47 kΩ, the bandwidth would be approximately 340 kHz.

Secondly, a “zero” is present in the frequency response

characteristic for both the “X” and “Y” inputs which causes

the output signal to rise in amplitude at a 6.0 dB/octave slope

at frequencies beyond the breakpoint of the “zero”. The

“zero” is caused by the parasitic and substrate capacitance

which is related to resistors RX and RY and the transistors

associated with them. The effect of these transmission

“zeros” is seen in Figures 11 and 12. The reason for this

increase in gain is due to the bypassing of RX and RY at high

frequencies. Since the RY resistor is approximately twice the

value of the RX resistor, the zero associated with the “Y”

input will occur at approximately one octave below the zero

associated with “X” input. For RX = 30 kΩ and RY = 62 kΩ,

the zeros occur at 1.5 MHz for the “X” input and 700 kHz

for the “Y” input. These two measured breakpoints

correspond to a shunt capacitance of about 3.5 pF. Thus, for

the circuit of Figure 19, the “X” input zero and “Y” input

zero will be at approximately 15 MHz and 7.0 MHz

respectively.

It should be noted that the MC1494 multiplies in the time

domain, hence, its frequency response is found by means of

complex convolution in the frequency (Laplace) domain.

This means that if the “X” input does not involve a

frequency, it is not necessary to consider the “X” side

frequency response in the output product. Likewise, for the

“Y” side. Thus, for applications such as a wideband linear

AGC amplifier which has a DC voltage as one input, the

multiplier frequency response has one zero and one pole. For

applications which involve an AC voltage on both the “X”

and “Y” side such as a balanced modulator, the product

voltage response will have two zeros and one pole, hence,

peaking may be present in the output.

From this brief discussion, it is evident that for AC

applications; (1) the value of resistors RX, RY and RL should

be kept as small as possible to achieve maximum frequency

response, and (2) it is possible to select a load resistor RL

such that the dominant pole (RL, CO) cancels the input zero

(RX, 3.5 pF or RY, 3.5 pF) to give a flat amplitude

characteristic with frequency. This is shown in Figures 11

and 12. Examination of the frequency characteristics of the

“X” and “Y” inputs will demonstrate that for wideband

amplifier applications, the best tradeoff with frequency

response and gain is achieved by using the “Y” input for the

AC signal.

For AC applications requiring bandwidths greater than

those specified for the MC1494, two other devices are

recommended. For modulator–demodulator applications,

the MC1496 may be used up to 100 MHz. For wideband

multiplier applications, the MC1495 (using small collector

loads and AC coupling) can be used.

Slew–Rate

The MC1494 multiplier is not slew–rate limited in the

ordinary sense that an op amp is. Since all the signals in the

multiplier are currents and not voltages, there is no charging

and discharging of stray capacitors and thus no limitations

beyond the normal device limitations. However, it should be

noted that the quiescent current in the output transistors is

0.5 mA and thus the maximum rate of change of the output

voltage is limited by the output load capacitance by the

simple equation:

Slew Rate

∆VO =

∆T

IO

C

Thus, if CO is 10 pF, the maximum slew rate would be:

∆VO

∆T

=

0.5 x 10– 3

10 x 10–12

=

50

V/µs

This can be improved, if necessary, by the addition of an

emitter–follower or other type of buffer.

Phase Vector Error

All multipliers are subject to an error which is known as

the phase vector error. This error is a phase error only and

does not contribute an amplitude error per se. The phase

vector error is best explained by an example. If the “X” input

is described in vector notation as;

X= Aë0°

and the “Y” input is described as;

Y= Bë0°

then the output product would be expected to be;

VO= ABë0° (see Figure 20)

However, due to a relative phase shift between the ‘‘X’’ and

‘‘Y’’ channels, the output product will be given by:

VO = ABëφ

Notice that the magnitude is correct but the phase angle of the

product is in error. The vector (V) associated with this error

is the ‘‘phase vector error’’. The startling fact about the phase

vector error is that it occurs and accumulates much more

rapidly than the amplitude error associated with frequency

response. In fact, a relative phase shift of only 0.57° will result

in a 1% phase vector error. For most applications, this error

is meaningless. If phase of the output product is not important,

then neither is the phase vector error. If phase is important,

such as in the case of double sideband modulation or

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