MC1495D 데이터 시트보기 (PDF) - ON Semiconductor
부품명
상세내역
제조사
MC1495D Datasheet PDF : 20 Pages
| |||
MC1495
Referring to Figure 21, the level shift components will be
determined. When VX = VY = 0, the currents I2 and I14 will
be equal to I13. In Step 3, RL was found to be 20 kΩ and in
Step 4, V2 and V14 were found to be approximately 11 V.
From this information RO can be found easily from the
following equation (neglecting the operational amplifiers
bias current):
V2
RL
+
I13
=
V+ −V2
RO
And
for
this
example,
11 V
20 kΩ
+
1.0
mA
=
15 V −11
RO
V
Solving for RO: RO = 2.6 kΩ, thus, select RO = 3.0 kΩ
For RO = 3.0 kΩ, the voltage at Pins 2 and 14 is calculated
to be:
V2 = V14 = 10.4 V.
The linearity of this circuit (Figure 21) is likely to be as
good or better than the circuit of Figure 5. Further
improvements are possible as shown in Figure 23 where RY
has been increased substantially to improve the Y linearity,
and RX decreased somewhat so as not to materially affect the
X linearity. This avoids increasing RL significantly in order
to maintain a K of 0.1.
The versatility of the MC1495 allows the user to to
optimize its performance for various input and output signal
levels.
OFFSET AND SCALE FACTOR ADJUSTMENT
Offset Voltages
Within the monolithic multiplier (Figure 3) transistor
base- emitter junctions are typically matched within 1.0 mV
and resistors are typically matched within 2%. Even with
this careful matching, an output error can occur. This output
error is comprised of X-input offset voltage, Y-input offset
voltage, and output offset voltage. These errors can be
adjusted to zero with the techniques shown in Figure 21.
Offset terms can be shown analytically by the transfer
function:
VO = K[Vx ± Viox ± Vx(off)] [Vy ± Vioy ± Vy(off)] ± VOO
(1)
Where:
K = scale factor
Vx = ‘‘x’’ input voltage
Vy = ‘‘y’’ input voltage
Viox = ‘‘x’’ input offset voltage
Vioy = ‘‘y’’ input offset voltage
Vx(off) = ‘‘x’’ input offset adjust voltage
Vy(off) = ‘‘y’’ input offset adjust voltage
VOO = output offset voltage.
− 15 V
− 15 V
VY′
±10 V
VX′
10 k
10 k
7.5 k
4 10 11
+
27 k
3.0 k
5 671
14
−
MC1495
3.0 k 3.0 k
7
3
+
MC1741C
4
6
10 k
9
+
2
+
2
−
5
10 k
3
13 k
5.0 k
Scale
Factor
Adjust
13
8
12 k
Y Offset
Adjust
12
33 k
10 k
X Offset
Adjust
Output
Offset
Adjust
1
40 k
15 k
+15 V
20 k
20 k
2.0 k
15 k
2.0 k
−15 V
+15 V
−VX VY
VO =
10
Figure 23. Multiplier with Improved Linearity
http://onsemi.com
10
Share Link: 