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MC33394 데이터 시트보기 (PDF) - Motorola => Freescale

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MC33394 Datasheet PDF : 44 Pages
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33394
PIN FUNCTION DESCRIPTION (44–QFN Package)
PIN NO.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
NAME
GND
SW2G
BOOT
SW1
SW1
SW1
VBAT
VBAT
KA_VBAT
VIGN
VKAM
VKAM_FB
VSEN
REGON
WAKEUP
VREF1
VPP_EN
VPP
VDD3_3
VDD3_3FB
VDDL_X
VDDL_B
VDDL_FB
/PRERESET
/HRESET
/PORESET
CANRXD
CANTXD
GND
CANL
CANH
HRT
/SLEEP
CS
DI
SCLK
DO
VREF3
VREF2
VDDH
VPRE_S
VPRE
VCOMP
INV
DESCRIPTION
Ground
External power switch (MOSFET) gate drive — Boost Reg.
Bootstrap capacitor
Source of the internal power switch (n–channel MOSFET)
Source of the internal power switch (n–channel MOSFET)
Source of the internal power switch (n–channel MOSFET)
Battery supply to IC (external reverse battery protection needed in some applications)
Battery supply to IC (external reverse battery protection needed in some applications)
Keep alive battery supply (with internal protection diode)
Turn on control through ignition switch (with internal protection diode)
VDDL tracking Keep Alive Memory (Standby) supply
VKAM output feedback
Switched battery output
Regulator “Hold On” input
CAN wake up event output
VDDH tracking linear regulator 1
VPP enable
5.0 V/ 3.3 V FLASH memory programming supply, tracking VDDH/VDD3_3
3.3 V regulated supply output, base drive for optional external pass transistor
VDD3_3 output feedback
VDDL optional external pass transistor base drive, operating in Boost Mode only
VDDL external pass transistor base drive
VDDL output feedback
Open drain /PRERESET output, occurs 0.7 us prior to /HRESET (Hardware Reset)
Open drain / HRESET (Hardware Reset) output
Open drain / PORESET (Power On Reset) supervising VKAM supply to the microprocessor.
CAN receive data (DOUT)
CAN transmit data (DIN)
Ground
CAN differential bus drive low line
CAN differential bus drive high line
Hardware Reset Timer pin (programmed with external capacitor and resistor)
Sleep Mode & Power Down control
SPI chip select
SPI serial data in
SPI clock input
SPI serial data out
VDDH tracking linear regulator 3
VDDH tracking linear regulator 2
5.0 V regulated supply output
Switching pre–regulator output sense
Switching pre–regulator output
Switching pre–regulator compensation (error amplifier output)
Switching pre–regulator error amplifier inverting input
NOTE: The exposed pad of the 44 QFN package is electrically and thermally connected with the IC ground.
4
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA

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