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MC74LVX50DR2G(2011) 데이터 시트보기 (PDF) - ON Semiconductor

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MC74LVX50DR2G
(Rev.:2011)
ON-Semiconductor
ON Semiconductor ON-Semiconductor
MC74LVX50DR2G Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
MC74LVX50
Hex Buffer
The MC74LVX50 is an advanced high speed CMOS buffer
fabricated with silicon gate CMOS technology.
The internal circuit is composed of three stages, including a buffered
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
Features
High Speed: tPD = 4.1 ns (Typ) at VCC = 3.3 V
Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C
High Noise Immunity: VNIH = VNIL = 28% VCC
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2.0 V to 3.6 V Operating Range
Low Noise: VOLP = 0.5 V (Max)
These Devices are PbFree and are RoHS Compliant
14
1
http://onsemi.com
MARKING
DIAGRAMS
14
SOIC14
D SUFFIX
CASE 751A
1
LVX50G
AWLYWW
14
1
14
TSSOP14
DT SUFFIX
CASE 948G
LVX
50
ALYWG
G
1
14
14
1
SOEIAJ14
M SUFFIX
CASE 965
LVX50
ALYWG
1
LVX50
A
WL, L
Y
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
WW, W = Work Week
G or G = PbFree Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
1
May, 2011 Rev. 4
Publication Order Number:
MC74LVX50/D

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