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MC74VHC50 데이터 시트보기 (PDF) - ON Semiconductor

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MC74VHC50
ON-Semiconductor
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MC74VHC50 Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
MC74VHC50
Hex Buffer
The MC74VHC50 is an advanced high speed CMOS buffer
fabricated with silicon gate CMOS technology.
The internal circuit is composed of three stages, including a buffered
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7 V, allowing the interface of 5 V systems
to 3 V systems.
High Speed: tPD = 3.8 ns (Typ) at VCC = 5 V
Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C
High Noise Immunity: VNIH = VNIL = 28% VCC
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2 V to 5.5 V Operating Range
Low Noise: VOLP = 0.8 V (Max)
These Devices are PbFree and are RoHS Compliant
http://onsemi.com
14LEAD SOIC
D SUFFIX
CASE 751A
14LEAD TSSOP
DT SUFFIX
CASE 948G
14LEAD SOIC EIAJ
M SUFFIX
CASE 965
PIN CONNECTION AND
MARKING DIAGRAM (Top View)
VCC A6 Y6 A5 Y5 A4 Y4
14 13 12 11 10 9 8
1
A1
3
A2
5
A3
9
A4
11
A5
13
A6
2
Y1
4
Y2
6
Y3
Y=A
8
Y4
10
Y5
12
Y6
Figure 1. Logic Diagram
A1
1
Y1
A2
1
Y2
A3
1
Y3
A4
1
Y4
A5
1
Y5
A6
1
Y6
Figure 2. Logic Symbol
1234567
A1 Y1 A2 Y2 A3 Y3 GND
For detailed package marking information, see the Marking
Diagram section on page 4 of this data sheet.
FUNCTION TABLE
A Input
L
H
Y Output
L
H
ORDERING INFORMATION
Device
Package Shipping
MC74VHC50DG
MC74VHC50MG
SOIC
SOIC EIAJ
55 Units/Rail
50 Units/Rail
MC74VHC50DR2G SOIC 2500 Units/T&R
MC74VHC50DTR2G TSSOP 2500 Units/T&R
© Semiconductor Components Industries, LLC, 2011
1
May, 2011 Rev. 5
Publication Order Number:
MC74VHC50/D

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