MH8S64DALD 데이터 시트보기 (PDF) - MITSUBISHI ELECTRIC
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MH8S64DALD Datasheet PDF : 55 Pages
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Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MH8S64DALD -6,-7,-8
536870912-BIT (8388608 - WORD BY 64-BIT)Synchronous DRAM
Serial Presence Detect Table II
31
Density of each bank on module
32
Command and Address signal input setup time
-6
-7,-8
33
Command and Address signal input hold time
-6
-7,-8
34
Data signal input setup time
-6
-7,-8
35
Data signal input hold time
-6
-7,-8
36-61
Superset Information (may be used in future)
62
SPD Revision
-6
-7,-8
63
Checksum for bytes 0-62
64-71
72
Manufactures Jedec ID code per JEP-108E
Manufacturing location
73-90
Manufactures Part Number
91-92
93-94
95-98
99-125
126
Revision Code
Manufacturing date
Assembly Serial Number
Manufacture Specific Data
Intetl specification frequency
-7
127
Intel specification CAS# Latency support
-6,-8
128+
Unused storage locations
64MByte
1.5ns
2ns
0.8ns
1ns
1.5ns
2ns
0.8ns
1ns
option
JEDEC2
rev 1.2A
Check sum for -6
Check sum for -7
Check sum for -8
MITSUBISHI
Miyoshi,Japan
Tajima,Japan
NC,USA
Germany
MH8S64DALD-6
MH8S64DALD-7
MH8S64DALD-8
PCB revision
year/week code
serial number
option
100MHz
CL=2/3,AP,CK0,2
CL=3,AP,CK0,2
open
10
15
20
08
10
15
20
08
10
00
02
12
92
05
45
1CFFFFFFFFFFFFFF
01
02
03
04
4D483853363444414C442D36202020202020
4D483853363444414C442D37202020202020
4D483853363444414C442D38202020202020
rrrr
yyww
ssssssss
00
64
AF
AD
00
MIT-DS-0339-0.0
MITSUBISHI
ELECTRIC
( 5 / 55 )
17.Sep.1999
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