MH8S64DALD-6 데이터 시트보기 (PDF) - MITSUBISHI ELECTRIC
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MH8S64DALD-6 Datasheet PDF : 55 Pages
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Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MH8S64DALD -6,-7,-8
536870912-BIT (8388608 - WORD BY 64-BIT)Synchronous DRAM
COMMAND TRUTH TABLE
COMMAND
Deselect
No Operation
MNEMONIC
CKE
n-1
CKE
n
/S
/RAS /CAS /WE BA0,1 A11
A10 A0-9
DESEL
NOP
H XHX X X X X X X
H XL H H H X X X X
Row Adress Entry &
Bank Activate
ACT
H XL L
HHV
V
V
V
Single Bank Precharge
Precharge All Bank
Column Address Entry
& Write
PRE
PREA
WRIT E
H XL L
H XL L
HL
HL
H XL H L
L
V
X
L
X
XXHX
V
V
L
V
Column Address Entry
& Write with Auto-
WRITEA H X L H L
L
VVHV
Precharge
Column Address Entry
& Read
READ
H XL H
L
HV
V
L
V
Column Address Entry
& Read with Auto
Precharge
Auto-Refresh
Self-Refresh Entry
Self-Refresh Exit
READA
REFA
REFS
REFSX
Burst Terminate
Mode Register Set
TERM
MRS
H XL H
L
HV
V
H
V
H HL L
L
HX
X
X
X
H LL L
L
HX
X
X
X
L HH X X X X X X X
L HL H H H X X X X
H XL H
H
L
X
X
X
X
H XL L
L
L
L
L
L V*1
H =High Level, L = Low Level, V = Valid, X = Don't Care, n = CK cycle number
NOTE:
1.A7-9 = 0, A0-6 = Mode Address
MIT-DS-0339-0.0
MITSUBISHI
ELECTRIC
( 8 / 55 )
17.Sep.1999
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