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MICRF219 데이터 시트보기 (PDF) - Micrel

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MICRF219 Datasheet PDF : 23 Pages
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Micrel
MICRF219
Electrical Characteristics (Continued)
Specifications apply for VDD = 3.3V, GND = 0V, CAGC = 4.7µF, CTH = 0.1µF, fRX = 433.92 MHz unless otherwise noted. Bold values
indicate –40°C – TA – 105°C. 1kbps data rate (Manchester encoded), reference oscillator frequency = 13.52127MHz.
Parameter
Condition
Min.
Typ.
Max. Units
Reference Oscillator Input Range
Reference Oscillator Source
Current
V(REFOSC) = 0V
0.2
1.5
VP-P
300
µA
Demodulator
CTH Source Impedance
CTH Leakage Current
FREFOSC = 9.81563 MHz
FREFOSC = 13.52127MHz
TA = 25ºC
TA = +105ºC
165
k
120
±2
±800
nA
Demodulator Filter Bandwidth
@ 315MHz
Programmable, see application section
1170
9400
Hz
Demodulator Filter Bandwidth
@ 434MHz
Programmable, see application section
1625
13000 Hz
Digital / Control Functions
DO Pin Output Current
Output Rise And Fall Times
As output source @ 0.8 VDD
sink @ 0.2 VDD
CI = 15pF, pin DO, 10-90%
260
600
µA
2
µsec
Input High Voltage
Pins SCLK, DO (As input), SHDN,SEL0,
SEL1,SQ
0.8VDD
V
Input Low Voltage
Pins SCLK, DO (As input), SHDN, SEL0,
SEL1,SQ
0.2VDD
V
Output Voltage High
DO
Output Voltage Low
DO
RSSI
0.8VDD
V
0.2VDD
V
RSSI DC Output Voltage Range
100dBm
40dBm
0.4
V
2.0
RSSI Response Slope
110dBm to -40dBm
25
mV/dB
RSSI Output Current
400
µA
RSSI Output Impedance
250
RSSI Response Time
50% data duty cycle, input power to Antenna = -
20dBm
0.3
sec
Notes:
1. Exceeding the absolute maximum rating may damage the device.
2. The device is not guaranteed to function outside of its operating rating.
3. Device is ESD sensitive. Use appropriate ESD precautions. Exceeding the absolute maximum rating may damage the device.
4. Sensitivity is defined as the average signal level measured at the input necessary to achieve 10-2 BER (bit error rate). The input signal is defined
as a return-to-zero (RZ) waveform with 50% average duty cycle (Manchester encoded) at a data rate of 1kbps.
5. When data burst does not contain preamble, duty cycle is defined as total duty cycle, including any “quiet” time between data bursts. When data
bursts contain preamble sufficient to charge the slice level on capacitor CTH, then duty cycle is the effective duty cycle of the burst alone. [For
example, 100msec burst with 50% duty cycle, and 100msec “quiet” time between bursts. If burst includes preamble, duty cycle is
TON/(TON+tOFF)= 50%; without preamble, duty cycle is TON/(TON+ TOFF + TQUIET) = 50msec/(200msec)=25%. TON is the (Average number of
1’s/burst) × bit time, and TOFF = (TBURST – TON.)
June 2011
4
M9999-060811
(408) 944-0800

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