RM5261A-300-H 데이터 시트보기 (PDF) - PMC-Sierra

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RM5261A-300-H

Microprocessor with 64-Bit System Bus

PMC-Sierra 

RM5261A™ Microprocessor with 64-Bit System Bus Data Sheet

Preliminary

List of Tables

Table 1 Integer Multiply/Divide Operations ................................................................................13

Table 2 Floating-Point Instruction Cycles ..................................................................................15

Table 3 Cache Attributes ...........................................................................................................21

Table 4 Boot-Time Mode Bit Stream .........................................................................................26

Table 5 System Interface ...........................................................................................................27

Table 6 Clock/Control Interface .................................................................................................28

Table 7 Interrupt Interface .........................................................................................................28

Table 8 JTAG Interface .............................................................................................................28

Table 9 Initialization Interface ....................................................................................................29

Table 10 Power Supply .............................................................................................................29

Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use

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Document ID: PMC-2002240, Issue 2

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