MSM5839B 데이터 시트보기 (PDF) - Oki Electric Industry

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MSM5839B

40-DOT SEGMENT DRIVER

Oki Electric Industry 

¡ Semiconductor

MSM5839B

FUNCTIONAL DESCRIPTION

Pin Functional Description

• DI1

The data input pin for the 20-bit shift register (from 1st to 20th bit). The display data is input

to the data pin in synchronization with a clock pulse.

• CP

Clock pulse input pin for the two 20-bit shift registers. The data is shifted in the two 20-bit shift

registers at the falling edge of the clock pulse. Data setup time (tSETUP) and data hold time

(tHOLD) are required each between DI1, DI21 and CP. Refer to the Switching Characteristics.

• DO20

The 20th output bit of the shift register.

The data which is input from DI1 is clocked out with the delay in the number of bits of the shift

register (20). A 40-bit shift register can be configured by connecting the output of this pin to

DI21 pin.

• DI21

The data input pin for the 20-bit shift register (from 21st to 40th bit).

Connecting the DO20 pin and this pin allows the device to be used as a 40-bit shift register.

• DO40

The 40th output bit of the shift register.

The data which is input from DI1 is clocked out with the delay in the number of the bits of the

shift register (20).

When extending the number of characters, this pin is used to cascade connect the next

MSM5839B.

• DF

Alternate signal input pin for LCD driving waveform.

• VDD(V1), VSS

Supply voltage pins. VDD should be 4.5 to 5.5V.

VSS is the ground pin (VSS = 0V).

• V2, V3, VEE(V4)

Bias supply voltage pins to drive the LCD. Bias voltage is supplied from an external source.

• LOAD

The signal for latching the shift register contents is input from this pin.

When LOAD pin is set at "H", the shift register contents are transferred to the 40-bit 4-level

driver. When LOAD pin is set at "L", the last display output data (O1 to O40), which was

transferred when LOAD pin was at "H", is held.

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