MSM7718-01 데이터 시트보기 (PDF) - Oki Electric Industry

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MSM7718-01

Echo Canceler with ADPCM CODEC

Oki Electric Industry 

¡ Semiconductor

MSM7718-01

BCLKP

Shift clock input for the PCM data (PCMPCO, PCMPCI, PCMADO, PCMADI, PCMLNO, PCMLNI,

PCMACO, PCMACI). The frequency is set in the range of 64 kHz to 2048 kHz.

This signal must be synchronized with the SYNCP signal. (Refer to Fig. 2.)

SYNCP

8 kHz synchronous signal input for transmit and receive PCM data.

This signal must be synchronized with the BCLKP signal. (Refer to Fig. 2.)

IS

Transmit ADPCM data output.

This data is the output data after ADPCM encoding, and is serially output from MSB in synchroniza-

tion with the rising edge of BCLKA and SYNCA. This pin is an open drain output which remains

in a high impedance state during power-down, and requires a pull-up resistor.

IR

Receive ADPCM data input.

ADPCM is shifted in on the rising edge of BCLKA in synchronization with SYNCA and input

orderly from MSB.

BCLKA

Shift clock input for the ADPCM data (IS, IR).

The frequency is from 64 kHz to 2048 kHz.

This signal must be synchronized with the SYNCA signal.

SYNCA

8 kHz synchronous signal input for transmit and receive ADPCM data.

Synchronize this data with BCLKA signal. SYNCA is used for indicating the MSB of the serial

ADPCM data stream.

DEN, EXCK, DIN, DOUT, INT

Serial control ports for MCU interface.

Reading and writing data is performed by an external MCU through these pins. 17-byte control

registers are provided in this device.

DEN is the “Enable” control signal input, EXCK is the data shift clock input, DIN is the address and

data input, and DOUT is the data output.

Input/output timing is shown in Fig. 5.

INT goes to logic “0” when any change has been found in the tone detection results in the tone

detection mode (change in the control register bits CR7-B3, B2), and goes to logic “1” when the data

of control register CR7 is read out.

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