MT28F160C3FD-11TET 데이터 시트보기 (PDF) - Micron Technology
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MT28F160C3FD-11TET Datasheet PDF : 28 Pages
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ADVANCE
1 MEG x 16
3V ENHANCED+ BOOT BLOCK FLASH MEMORY
COMMAND DEFINITIONS
Once a specific command code has been entered, the
WSM executes an internal algorithm generating the nec-
essary timing signals to program, erase, and verify data.
See Table 3 for the CSM command definitions and data
for each of the bus cycles.
Table 3
Command Definitions
FIRST CYCLE
COMMAND
OPERATION ADDRESS CSM/INPUT
READ ARRAY
WRITE
X
FFh
IDENTIFY DEVICE
WRITE
X
90h
READ STATUS REGISTER
WRITE
X
70h
WORD PROGRAM
WRITE
X
10h/40h
BLOCK ERASE
WRITE
X
20h
PROGRAM/ERASE SUSPEND WRITE
X
B0h
PROGRAM/ERASE RESUME WRITE
X
D0h
CLEAR STATUS REGISTER
WRITE
X
50h
SOFT PROTECTION
WRITE
X
0Fh
OTP ENTRY
WRITE
X
AFh
OTP EXIT
WRITE
X
FFh
SECOND CYCLE
OPERATION ADDRESS
READ
WA
READ
IA
READ
BA
WRITE
WA
WRITE
BA
WRITE
BA
WRITE
X
WRITE
X
DATA
AD
ID
SRD
PD
D0h
SPC
AFh
FFh
NOTE: 1. The command data is written through DQ0-DQ7
2. ID = Manufacturer ID: 002Ch; Device ID (Top Boot): 4492h; Device ID (Bottom Boot): 4493h
3. IA = Identify address: 00000h for manufacturer code and 00001h for device code
4. BA = Any address within the block to be selected
5. WA = Word address
6. AD = Array data
7. SRD = Data read from status register
8. PD = Data to be written at location WA
9. SPC = Soft protect command:
00h = Clear all soft protection
FFh = Set all soft protection
F0h = Clear addressed block soft protection
0Fh = Set addressed block soft protection
10. X = Don’t Care
1 Meg x 16 3V Enhanced+ Boot Block Flash Memory
MT28F160C3_3.p65 – Rev. 3, Pub. 8/01
8
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2001, Micron Technology, Inc.
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