MT8814AP 데이터 시트보기 (PDF) - Mitel Networks

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MT8814AP

ISO-CMOS 8 x 12 Analog Switch Array

Mitel Networks 

ISO-CMOS MT8814

Functional Description

Address Decode

The MT8814 is an analog switch matrix with an array

size of 8 x 12. The switch array is arranged such that

there are 8 columns by 12 rows. The columns are

referred to as the Y inputs/outputs and the rows are

the X inputs/outputs. The crosspoint analog switch

array will interconnect any X I/O with any Y I/O when

turned on and provide a high degree of isolation

when turned off. The control memory consists of a 96

bit write only RAM in which the bits are selected by

the address inputs (AY0-AY2, AX0-AX3). Data is

presented to the memory on the DATA input. Data is

asynchronously written into memory whenever both

the CS (Chip Select) and STROBE inputs are high

and are latched on the falling edge of STROBE. A

logical “1” written into a memory cell turns the

corresponding crosspoint switch on and a logical “0”

turns the crosspoint off. Only the crosspoint switches

corresponding to the addressed memory location are

altered when data is written into memory. The

remaining switches retain their previous states. Any

combination of X and Y inputs/outputs can be

interconnected by establishing appropriate patterns

in the control memory. A logical “1” on the RESET

input will asynchronously return all memory locations

to logical “0” turning off all crosspoint switches

regardless of whether CS is high or low. Two voltage

reference pins (VSS and VEE) are provided for the

MT8814 to enable switching of negative analog

signals. The range for digital signals is from VDD to

VSS while the range for analog signals is from VDD to

VEE. VSS and VEE pins can be tied together if a

single voltage reference is needed.

The seven address inputs along with the STROBE

and CS (Chip Select) are logically ANDed to form an

enable signal for the resettable transparent latches.

The DATA input is buffered and is used as the input

to all latches. To write to a location, RESET must be

low and CS must go high while the address and data

are set up. Then the STROBE input is set high and

then low causing the data to be latched. The data

can be changed while STROBE is high, however, the

corresponding switch will turn on and off in

accordance with the DATA input. DATA must be

stable on the falling edge of STROBE in order for

correct data to be written to the latch.

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