MT8889C 데이터 시트보기 (PDF) - Zarlink Semiconductor Inc

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MT8889C

Integrated DTMFTransceiver with Adaptive Micro Interface

Zarlink Semiconductor Inc 

MT8889C

BIT

NAME

STATUS FLAG SET

STATUS FLAG CLEARED

b0

IRQ

Interrupt has occurred. Bit one

Interrupt is inactive. Cleared after

(b1) or bit two (b2) is set.

Status Register is read.

b1 TRANSMIT DATA

REGISTER EMPTY

(BURST MODE ONLY)

Pause duration has terminated

and transmitter is ready for new

data.

Cleared after Status Register is

read or when in non-burst mode.

b2 RECEIVE DATA REGISTER Valid data is in the Receive Data Cleared after Status Register is

FULL

Register.

read.

b3 DELAYED STEERING

Set upon the valid detection of the Cleared upon the detection of a

absence of a DTMF signal.

valid DTMF signal.

Table 8. Status Register Description

DTMF/CP

INPUT

C1

R1

R2

DTMF

OUTPUT

R5

C4

X-tal

RL

MT8880C

IN+

VDD

IN-

St/GT

GS

VRef

ESt

R3

D3

VSS

D2

OSC1

D1

OSC2

D0

TONE

IRQ/CP

R/W/WR DS/RD

CS

RS0

VDD

C3

C2

R4

To µP

or µC

Notes:

R1, R2 = 100 kΩ 1%

R3 = 374 kΩ 1%

R4 = 3.3 kΩ 10%

R5 = 4.7 MΩ 10%

RL = 10 k Ω (min.)

C1 = 100 nF 5%

C2 = 100 nF 5%

C3 = 100 nF 10%*

C4 = 10 nF 10%

X-tal = 3.579545 MHz

* Microprocessor based systems can inject undesirable noise into the supply rails.

The performance of the MT8889C can be optimized by keeping

noise on the supply rails to a minimum. The decoupling capacitor (C3) should be

connected close to the device and ground loops should be avoided.

Figure 13 - Application Circuit (Single-Ended Input)

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