MT9172AN1 데이터 시트보기 (PDF) - Zarlink Semiconductor Inc
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MT9172AN1 Datasheet PDF : 28 Pages
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MT9171/72
Data Sheet
DC Electrical Characteristics† - Voltages are with respect to ground (VSS) unless otherwise stated.
Characteristics
Sym. Min. Typ.* Max. Units
Test Conditions
11
Input High Voltage (ex OSC1) VIH 2.0
V
12
Input Low Voltage (ex OSC1)
VIL
0.8 V
13 I Input High Voltage (OSC1)
14
N
P
Input Low Voltage (OSC1)
15 U Input Leakage Current
T
16 S Input Pulldown Impedance
LOUT DIS and Precan
VIHo 4.0
V
VILo
1.0 V
IIL
10
µA VIN=VSS to VDD
ZPD
50
kΩ
17
Input Leakage Current for
IIOSC
20
µA
OSC1 Input
* Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.
† Parameters over recommended temperature & power supply voltage ranges.
AC Electrical Characteristics† - Voltages are with respect to ground (VSS) unless otherwise stated.
Characteristics
Sym. Min. Typ.* Max. Units
Test Conditions
1
Input Voltage
(LIN)
VIN
5.0
Vpp
2
Input Impedance
(LIN)
3 I Crystal/Clock Frequency
N
4 P Crystal/Clock Tolerance
5a
U
T
Crystal/Clock Duty Cycle1
5b S Crystal/Clock Duty Cycle1
ZIN
fC
TC
DCC
DCC
20
10.24
-100 0 +100
40 50 60
45 50 55
kΩ fBaud=160 kHz
MHz
ppm
% Normal temp. & VDD
% Recommended at max./
min. temp. & VDD
6
Crystal/Clock Loading
CL
33
50
pF From OSC1 & OSC2 to VSS.
7 O Output Capacitance (LOUT)
Co
8
8 U Load Resistance
(LOUT)
RLout
500
T
(VBias, VRef)
100
P
9 U Load Capacitance
(LOUT) CLout
20
T
(VBias, VRef)
0.1
10 S Output Voltage
(LOUT)
Vo
3.2 4.3 4.6
pF
Ω
kΩ
pF Capacitance to VBias.
µF
Vpp RLout = 500Ω, CLout = 20pF
† Timing is over recommended temperature & power supply voltages.
* Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.
1. Duty cycle is measured at VDD/2 volts.
.
19
Zarlink Semiconductor Inc.
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