CY7C0430V-133BGI 데이터 시트보기 (PDF) - Cypress Semiconductor
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CY7C0430V-133BGI Datasheet PDF : 36 Pages
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PRELIMINARY
CY7C0430V
Switching Characteristics Over the Industrial Operating Range
Parameter
fMAX2
tCYC2
tCH2
tCL2
tR
tF
tSA
tHA
tSC
tHC
tSW
tHW
tSD
tHD
tSB
tHB
tSCLD
tHCLD
tSCINC
tHCINC
tSCRST
tHCRST
tSCRD
tHCRD
tSMLD
tHMLD
tSMRD
tHMRD
tOE
tOLZ[5]
tOHZ[5]
tCD2
tCA2
tCM2
tDC
tCKHZ[6]
tCKLZ[6]
tSINT
tRINT
tSCINT
tRCINT
Description
Maximum Frequency
Clock Cycle Time
Clock HIGH Time
Clock LOW Time
Clock Rise Time
Clock Fall Time
Address Set-up Time
Address Hold Time
Chip Enable Set-up Time
Chip Enable Hold Time
R/W Set-up Time
R/W Hold Time
Input Data Set-up Time
Input Data Hold Time
Byte Set-up Time
Byte Hold Time
CNTLD Set-up Time
CNTLD Hold Time
CNTINC Set-up Time
CNTINC Hold Time
CNTRST Set-up Time
CNTRST Hold Time
CNTRD Set-up Time
CNTRD Hold Time
MKLD Set-up Time
MKLD Hold Time
MKRD Set-up Time
MKRD Hold Time
Output Enable to Data Valid
OE to LOW Z
OE to HIGH Z
Clock to Data Valid
Clock to Counter Address Readback Valid
Clock to Mask Register readback Valid
Data Output Hold After Clock HIGH
Clock HIGH to Output High Z
Clock HIGH to Output LOW Z
Clock to INT Set Time
Clock to INT Reset Time
Clock to CNTINT Set Time
Clock to CNTINT Reset Time
CY7C0430V
–133
–100
Min.
Max.
Min.
Max.
133
100
7.5
10
3
4
3
4
2
3
2
3
2.5
3
0.5
0.5
2.5
3
0.5
0.5
2.5
3
0.5
0.5
2.5
3
0.5
0.5
2.5
3
0.5
0.5
2.5
3
0.5
0.5
2.5
3
0.5
0.5
2.5
3
0.5
0.5
2.5
3
0.5
0.5
2.5
3
0.5
0.5
2.5
3
0.5
0.5
6.5
8
1
1
1
6
1
7
4.7
5
4.7
5
4.7
5
1
1
1
4.8
1
6.8
1
1
1
6.5
1
8
1
6.5
1
8
1
6.5
1
8
1
6.5
1
8
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
9
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