MT9160AN1 데이터 시트보기 (PDF) - Zarlink Semiconductor Inc
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MT9160AN1 Datasheet PDF : 33 Pages
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MT91L60/61
Data Sheet
Pin Description (continued)
Pin #
20 Pin24 Pin
Name
Description
12
14
Din Data Input. A digital input for 8 bit wide channel data received from the Layer 1
transceiver. Data is sampled on the falling edge of the bit clock during the timeslot
defined by STB, or according to standard ST-BUS timing. Input level is CMOS
compatible.
13
15 STB/F0i Data Strobe/Frame Pulse (Input). For SSI mode this input determines the 8 bit
timeslot used by the device for both transmit and receive data. This active high
signal has a repetition rate of 8 kHz. Standard frame pulse definitions apply in ST-
BUS mode. CMOS level compatible input.
16 STBd/F0 Delayed Frame Pulse Output. In SSI mode, an 8 bit wide strobe is output after the
od first strobe goes low. In ST-BUS mode, a frame pulse is output after 4 channel
(MT91L6 timeslots.
1 only)
14
17 CLOCKin Clock (Input). The clock provided to this input pin is used for the internal device
functions. For SSI mode connect the bit clock to this pin when it is 512 kHz or
greater. Connect a 4096 kHz clock to this input when the available bit clock is
128 kHz or 256 kHz. For ST-BUS mode connect C4i to this pin. CMOS level
compatible.
15
18
VDD Positive Power Supply (Input). Nominally 3 volts.
16
19 HSPKR- Inverting Handset Speaker (Output). Output to the handset speaker (balanced).
17
20 HSPKR+ Non-Inverting Handset Speaker (Output). Output to the handset speaker
(balanced).
18
22
VSSA Analog Ground (Input). Nominally 0 volts.
19
23
M- Inverting Microphone (Input). Inverting input to microphone amplifier from the
handset microphone.
20
24
M+ Non-Inverting Microphone (Input). Non-inverting input to microphone amplifier
from the handset microphone.
3,9,
16,21
NC No Connect. (24 Packages only). Pin 16 is NC for MT91L60.
Overview
The 3 V Multi-featured Codec (MFC) features complete Analog/Digital and Digital/Analog conversion of audio signals
(Filter/Codec) and an analog interface to a standard handset transmitter and receiver (Transducer Interface). The receiver
amplifier is capable of driving a 300 ohm load.
Each of the programmable parameters within the functional blocks is accessed through a serial microcontroller port
compatible with Intel MCS-51®, Motorola SPI® and National Semiconductor Microwire® specifications. These
parameters include: gain control, power down, mute, B-Channel select (ST-BUS mode), C&D channel
control/access, law control, digital interface programming and loopback. Optionally the device may be used in a
controllerless mode utilizing the power-on default settings.
4
Zarlink Semiconductor Inc.
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