NMC27C64 데이터 시트보기 (PDF) - Fairchild Semiconductor

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NMC27C64

65,536-Bit (8192 x 8) CMOS EPROM

Fairchild Semiconductor 

Programming Waveforms (Note 13)

ADDRESS

2V

0.8V

2V

DATA

0.8V

Program

Address N

tAS

Data In Stable

Add N

tDS

tDH

Hi-Z

Program

Verify

tAH

Data Out Valid

Add N

tDF

6.0V

VCC

VPP 13.0V

CE 0.8V

2V

PGM 0.8V

2V

OE 0.8V

tVCS

tVPS

tCES

tPW

tOES

tOE

Note 11: Fairchild’s standard product warranty applies to devices programmed to specifications described herein.

Note 12: VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP. The EPROM must not be inserted into or removed from a board with

voltage applied to VPP or VCC.

Note 13: The maximum absolute allowable voltage which may be applied to the VPP pin during programming is 14V. Care must be taken when switching the VPP supply to

prevent any overshoot from exceeding this 14V maximum specification. At least a 0.1 µF capacitor is required across VPP, VCC to GND to suppress spurious voltage transients

which may damage the device.

Note 14: Programming and program verify are tested with the interactive Program Algorithm, at typical power supply voltages and timings.

NMC27C64 Rev. C

6

www.fairchildsemi.com

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