MX23L8051 데이터 시트보기 (PDF) - Macronix International

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MX23L8051

8M-BIT [8M x 1] CMOS SERIAL MASK-ROM

Macronix International 

MX23L8051

DEVICE OPERATION

1.When incorrect command is inputted to this LSI, this LSI becomes standby mode and keeps the standby mode until

next CS falling edge. In standby mode, SO pin of this LSI should be High-Z.

2.When correct command is inputted to this LSI, this LSI becomes active mode and keeps the active mode until next CSB

rising edge.

COMMAND DESCRIPTION

(1) Read Array

This command is sent with the 4-byte address (command included), and the byte address, followed by four dummy bytes

sent to give the device time to stabilize. The device will then send out data starting at the byte address until CS goes

high. The clock to clock out the data is supplied by the master serial peripheral interface.

(2) Standby Mode

When CS is high and there is no operation in progress, the device is put in standby mode. Typical standby current is less

than 30uA.

DATA SEQUENCE

Output data is serially sent out through SO pin, synchronized with the rising edge of SCLK, whereas input data is serially

read in through SI pin, synchronized with the rising edge of SCLK. The bit sequence for both input and output data is bit

7 (MSB) first, then bit 6, bit 5, ...., and bit 0.(LSB)

ADDRESS SEQUENCE

The address assignment is described as follows :

BA: Byte address Bit sequence:

X A6 A5 A4 A3 A2 A1 A0

AD1:First Address Bit sequence:

X X X X X A19 A18 A17

AD2:Second Address Bit sequence: A16 A15 A14 A13 A12 A11 A10 A9

AD3:Thrid Address Bit sequence: X X X X X X A8 A7

P/N: PM0838

REV. 1.1, JUN. 23, 2003

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