NCP1207A 데이터 시트보기 (PDF) - ON Semiconductor

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NCP1207A

PWM Current-Mode Controller for Free Running Quasi-Resonant Operation

ON Semiconductor 

NCP1207A, NCP1207B

SAMPLING HERE

8.0

NCP1207A/B Aux

1

8

6.0

2

7

ON/OFF

3

6

4.0

4

5

2.0

4.5 ms

0

Figure 20. A voltage sample is taken 4.5 ms after

the turn-off sequence

When an OVP condition has been detected, the

NCP1207A/B enters a latchoff phase and stops all switching

operations. The controller stays fully latched in this position

and the DSS is still active, keeping the VCC between 5.3

V/12 V as in normal operations. This state lasts until the VCC

is cycled down 4 V, e.g. when the user unplugs the power

supply from the mains outlet.

By default, the OVP comparator is biased to a 5.0ĂV

reference level and pin1 is routed via a divide by 1.44

network. As a result, when Vpin 1 reaches 7.2ĂV, the OVP

comparator is triggered. The threshold can thus be adjusted

by either modifying the power winding to auxiliary winding

turn ratios to match this 7.2ĂV level, or insert a resistor from

Pin 1 to ground to cope with your design requirement.

Latching Off the NCP1207A/B

In certain cases, it can be very convenient to externally

shut down permanently the NCP1207A/B via a dedicated

signal, e.g. coming from a temperature sensor. The reset

occurs when the user unplugs the power supply from the

mains outlet. To trigger the latchoff, a CTN (Figure 21) or

a simple NPN transistor (Figure 22) can do the work.

CTN

NCP1207A/B

Aux

1

8

2

7

3

6

4

5

Figure 21. A simple CTN triggers the latchoff as

soon as the temperature exceeds a given setpoint

Figure 22. A simple transistor arrangement allows

to trigger the latchoff by an external signal

Shutting Off the NCP1207A/B

Shutdown can easily be implemented through a simple

NPN bipolar transistor as depicted by Figure 23. When OFF,

Q1 is transparent to the operation. When forward biased, the

transistor pulls the FB pin to ground (VCE(sat) ≈ 200 mV) and

permanently disables the IC. A small time constant on the

transistor base will avoid false triggering (Figure 23).

NCP1207A/B

1

8

10 k

ON/OFF

2

Q1

1

3

7

6

3

2

4

5

10 nF

Figure 23. A simple bipolar transistor totally

disables the IC

Power Dissipation

The NCP1207A/B is directly supplied from the DC rail

through the internal DSS circuitry. The DSS being an

auto-adaptive circuit (e.g. the ON/OFF duty-cycle adjusts

itself depending on the current demand), the current flowing

through the DSS is therefore the direct image of the

NCP1207A/B current consumption. The total power

dissipation

can

be

evaluated

using:

(VHVDC * 11ĂV) @ ICC2. If we operate the device on a 250

Vac rail, the maximum rectified voltage can go up to 350

Vdc. As a result, the worse case dissipation occurs at the

maximum switching frequency and the highest line. The

dissipation is actually given by the internal consumption of

the NCP1207A/B when driving the selected MOSFET. The

best method to evaluate this total consumption is probably

to run the final circuit from a 50 Vdc source applied to pin 8

and measure the average current flowing into this pin.

Suppose that we find 2.0 mA, meaning that the DSS

duty-cycle will be 2.0/7.0 = 28.6%.

From the 350 Vdc rail, the part will dissipate:

350ĂV @ 2.0ĂmA + 700ĂmW (however this 2.0 mA number

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