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NCP362(2009) 데이터 시트보기 (PDF) - ON Semiconductor

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NCP362 Datasheet PDF : 16 Pages
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NCP362
Operation
NCP362 provides overvoltage protection for positive
voltage, up to 20 V. A PMOS FET protects the systems
(i.e.: VBUS) connected on the Vout pin, against positive
overvoltage. The Output follows the VBUS level until
OVLO threshold is overtaken.
Undervoltage Lockout (UVLO)
To ensure proper operation under any conditions, the
device has a builtin undervoltage lock out (UVLO)
circuit. During Vin positive going slope, the output remains
disconnected from input until Vin voltage is above 3.0 V
nominal. The FLAG output is pulled to low as long as Vin
does not reach UVLO threshold. This circuit has a 70 mV
hysteresis to provide noise immunity to transient condition.
Vin (V)
20 V
OVLO
UVLO
0
Vout
OVLO
UVLO
0
Figure 24. Output Characteristic vs. Vin
Overvoltage Lockout (OVLO)
To protect connected systems on Vout pin from
overvoltage, the device has a builtin overvoltage lock out
(OVLO) circuit. During overvoltage condition, the output
remains disabled until the input voltage exceeds 6.0 V.
FLAG output is tied to low until Vin is higher than
OVLO. This circuit has a 100 mV hysteresis to provide
noise immunity to transient conditions.
Overcurrent Protection (OCP)
The NCP362 integrates overcurrent protection to
prevent system/battery overload or defect. The current
limit threshold is internally set at 750 mA. This value can
be changed from 150 mA to 750 mA by a metal tweak,
please contact your ON Semiconductor representative for
availability. During current fault, the internal PMOS FET
is automatically turned off (5 ms) if the charge current
exceeds Ilim. NCP362 goes into turn on and turn off mode
as long as defect is present. The internal ton delay (4 ms
typical) allows limiting thermal dissipation. The Flag pin
goes to low level when an overcurrent fault appears. That
allows the microcontroller to count defect events and turns
off the PMOS with EN pin.
Vout
t
I
Ilimit
toff
ton
Overcurrent
t
Retrieve normal
operation
Figure 25. Overcurrent Event Example
FLAG Output
NCP362 provides a FLAG output, which alerts external
systems that a fault has occurred.
This pin is tied to low as soon as: 1.2 V < Vin < UVLO,
Vin > OVLO, Icharge > Ilimit, TJ > 150°C. When NCP362
recovers normal condition, FLAG is held high. The pin is
an open drain output, thus a pull up resistor (typically 1 MW
Minimum 10 kW) must be provided to VCC. FLAG pin is
an open drain output.
EN Input
To enable normal operation, the EN pin shall be forced
to low or connected to ground. A high level on the pin
disconnects OUT pin from IN pin. EN does not overdrive
an OVLO or UVLO fault.
Internal PMOS FET
The NCP362 includes an internal PMOS FET to protect
the systems, connected on OUT pin, from positive
overvoltage. Regarding electrical characteristics, the
RDS(on), during normal operation, will create low losses on
Vout pin, characterized by Vin versus Vout dropout.
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