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NCV4266 데이터 시트보기 (PDF) - ON Semiconductor

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NCV4266 Datasheet PDF : 11 Pages
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NCV4266
Circuit Description
The NCV4266 is an integrated low dropout regulator that
provides a regulated voltage at 150 mA to the output. It is
enabled with an input to the enable pin. The regulator
voltage is provided by a PNP pass transistor controlled by
an error amplifier with a bandgap reference, which gives it
the lowest possible dropout voltage. The output current
capability is 150 mA, and the base drive quiescent current
is controlled to prevent oversaturation when the input
voltage is low or when the output is overloaded. The
regulator is protected by both current limit and thermal
shutdown. Thermal shutdown occurs above 150°C to
protect the IC during overloads and extreme ambient
temperatures.
Regulator
The error amplifier compares the reference voltage to a
sample of the output voltage (VQ) and drives the base of a
PNP series pass transistor via a buffer. The reference is a
bandgap design to give it a temperaturestable output.
Saturation control of the PNP is a function of the load
current and input voltage. Oversaturation of the output
power device is prevented, and quiescent current in the
ground pin is minimized. See Figure 2, Test Circuit, for
circuit element nomenclature illustration.
Regulator Stability Considerations
The input capacitors (CI1 and CI2) are necessary to
stabilize the input impedance to avoid voltage line
influences. Using a resistor of approximately 1.0 W in
series with CI2 can stop potential oscillations caused by
stray inductance and capacitance.
The output capacitor helps determine three main
characteristics of a linear regulator: startup delay, load
transient response and loop stability. The capacitor value
and type should be based on cost, availability, size and
temperature constraints. The aluminum electrolytic
capacitor is the least expensive solution, but, if the circuit
operates at low temperatures (25°C to 40°C), both the
value and ESR of the capacitor will vary considerably. The
capacitor manufacturer’s data sheet usually provides this
information.
The value for the output capacitor CQ, shown in Figure 2,
should work for most applications; see also Figure 3 for
output stability at various load and Output Capacitor ESR
conditions. Stable region of ESR in Figure 3 shows ESR
values at which the LDO output voltage does not have any
permanent oscillations at any dynamic changes of output
load current. Marginal ESR is the value at which the output
voltage waving is fully damped during four periods after
the load change and no oscillation is further observable.
ESR characteristics were measured with ceramic
capacitors and additional series resistors to emulate ESR.
Low duty cycle pulse load current technique has been used
to maintain junction temperature close to ambient
temperature.
Enable Input
The enable pin is used to turn the regulator on or off. By
holding the pin down to a voltage less than 1.8 V, the output
of the regulator will be turned off. When the voltage on the
enable pin is greater than 2.8 V, the output of the regulator
will be enabled to power its output to the regulated output
voltage. The enable pin may be connected directly to the
input pin to give constant enable to the output regulator.
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