SPT7851 데이터 시트보기 (PDF) - Signal Processing Technologies
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SPT7851 Datasheet PDF : 8 Pages
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ABSOLUTE MAXIMUM RATINGS (Beyond which damage may occur)1 25 °C
Supply Voltages
VDD1 .............................................................................. –0.5 V to +6 V
VDD2 .............................................................................. –0.5 V to +6 V
VDD3 .............................................................................. –0.5 V to +6 V
Temperature
Operating Temperature ............................. –40 to +85 °C
Storage Temperature ............................... –65 to +125 °C
Input Voltages
Analog Input ................................. –0.5 V to (VDD +0.5 V)
Digital Input .................................. –0.5 V to (VDD +0.5 V)
VREF+ ........................................... –0.5 V to (VDD +0.5 V)
VREF– ........................................... –0.5 V to (VDD +0.5 V)
CLK .............................................. –0.5 V to (VDD +0.5 V)
Note: 1. Operation at any Absolute Maximum Rating is not implied. See Electrical Specifications for proper nominal
applied conditions in typical applications.
ELECTRICAL SPECIFICATIONS
TA = TMIN–TMAX , VDD1 = VDD2 = VDD3 = 3.3 V, VREF– = 1.0 V, VREF+ = 2.0 V, Common Mode Voltage = 1.65 V, ƒCLK = 20 MSPS,
Bias 1 = 90 µA, Bias 2 = 9.5 µA, Differential Input, Duty Cycle = 50%, unless otherwise specified.
TEST
TEST
SPT7851
PARAMETERS
CONDITIONS
LEVEL
MIN
TYP
MAX UNITS
DC Accuracy
Resolution
Differential Linearity
Integral Linearity
No Missing Codes
10
Bits
V
±0.6
LSB
V
±0.75
LSB
VI
Guaranteed
Analog Input
Input Voltage Range (Differential)
IV
±0.6
±1.0
±1.7
V
Common Mode Input Voltage
IV
1.2
1.65
1.9
V
Input Capacitance
V
1.4
pF
Input Bandwidth (Large Signal)
V
120
MHz
Offset (Mid-scale)
Gain Error
VIN+ = VIN– = VCM
V
V
±1.0
% FSR
0.3
% FSR
Reference Voltages
Reference Input Voltage Range
(VREF+ – VREF–)
Negative Reference Voltage (VREF–)
Positive Reference Voltage (VREF+)
Common Mode Output Voltage (VCM)
VREF+ Current
VREF– Current
Switching Performance
Maximum Conversion Rate
Pipeline Delay
(See Timing Diagram)
Aperture Delay Time (TAP)
Aperture Jitter Time
IO = –1 µA
IV
0.6
1.0
1.7
V
IV
0.9
1.0
1.3
V
IV
1.9
2.0
2.9
V
VI
1.3
1.65
1.8
V
V
35
µA
V
–25
µA
VI
20
IV
7.5
V
5
V
10
MHz
Clocks
ns
ps-rms
SPT
2
SPT7851
8/1/00
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