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NLSX5012DMR2G 데이터 시트보기 (PDF) - ON Semiconductor

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NLSX5012DMR2G Datasheet PDF : 16 Pages
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NLSX5012
2-Bit 100 Mb/s Configurable
Dual-Supply Level
Translator
The NLSX5012 is a 2-bit configurable dual-supply autosensing
bidirectional level translator that does not require a direction control
pin. The I/O VCC- and I/O VL-ports are designed to track two
different power supply rails, VCC and VL respectively. Both the VCC
and the VL supply rails are configurable from 0.9 V to 4.5 V. This
allows a logic signal on the VL side to be translated to either a higher
or a lower logic signal voltage on the VCC side, and vice-versa.
The NLSX5012 offers the feature that the values of the VCC and
VL supplies are independent. Design flexibility is maximized
because VL can be set to a value either greater than or less than the
VCC supply. In contrast, the majority of competitive auto sense
translators have a restriction that the value of the VL supply must be
equal to less than (VCC - 0.4) V.
The NLSX5012 has high output current capability, which allows
the translator to drive high capacitive loads such as most high
frequency EMI filters. Another feature of the NLSX5012 is that each
I/O_VLn and I/O_VCCn channel can function as either an input or an
output.
An Output Enable (EN) input is available to reduce the power
consumption. The EN pin can be used to disable both I/O ports by
putting them in 3-state which significantly reduces the supply current
from both VCC and VL. The EN signal is referenced to the VL supply.
Features
Wide VCC, VL Operating Range: 0.9 V to 4.5 V
VL and VCC are independent
VL may be greater than, equal to, or less than VCC
High 100 pF Capacitive Drive Capability
HighSpeed with 140 Mb/s Guaranteed Date Rate
for VCC, VL > 1.8 V
Low BittoBit Skew
Overvoltage Tolerant Enable and I/O Pins
Nonpreferential PowerUp Sequencing
PowerOff Protection
Small packaging: UDFN8, SO8, Micro8
These are PbFree Devices
Typical Applications
Mobile Phones, PDAs, Other Portable Devices
Important Information
ESD Protection for All Pins:
HBM (Human Body Model) > 8000 V
http://onsemi.com
MARKING
DIAGRAMS
8
1
UDFN8
MU SUFFIX
CASE 517AJ
AE M
G
VA = Specific Device Code
M = Date Code
G = PbFree Package
8
1
SO8
D SUFFIX
CASE 751
8
SX5012
ALYWG
G
1
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G = PbFree Package
8
Micro8
5012
DM SUFFIX
AYWG
CASE 846A
G
1
1
A
= Assembly Location
Y
= Year
W
= Work Week
G = PbFree Package
ORDERING INFORMATION
Device
Package
Shipping
NLSX5012MUTAG UDFN8 3000/Tape & Reel
(PbFree)
NLSX5012DR2G
SO8 2500/Tape & Reel
(PbFree)
NLSX5012DMR2G Micro8 4000/Tape & Reel
(PbFree)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2011
1
April, 2011 Rev. 2
Publication Order Number:
NLSX5012/D

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