NM93C56A 데이터 시트보기 (PDF) - Fairchild Semiconductor

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NM93C56A

2K-Bit Serial CMOS EEPROM (MICROWIRE™ Synchronous Bus)

Fairchild Semiconductor 

Timing Diagrams

; SYNCHRONOUS DATA TIMING

;

CS

;;

;;; ;; ;; ; tSKS tCSS

tSKH

tSKL

;

; ; tCSH

SK ; ; ;; ;; ;

; ;;;;; ; ; tDIS tDIH

;;

;;

DI

;;;;;; ;;;;;;;; ; Valid

Input

Valid

Input

;;;;;;;;;;;;;;;;;;;

;;;;;; ;;;t;PD;;;; ;tDH;;;tP;D ;;;;;;;;;;;;;;tDF;;

;;;;;;;;;;;;;; ;;;;;; ;;;;;;;; ; DO (Data Read)

Valid

Output

Valid

Output

; tSV;;;;;;; ;;;;;; ;;;;;;;; ;tDF

;;;;;;;;; DO (Status Read)

Valid Status

;

READ CYCLE (READ)

tCS

CS

SK

DI

1 1 0 An An-1 A1 A0 ;;;;;;;;;;;;;;

Start Opcode

Bit Bits(2)

Address

Bits(8/9)

;;;;;;;;;;;;;;

DO

High - Z

0 Dn

;;; D1 D0

Dummy

Bit

93C56A (ORG=1; An=A7; Dn=D15):

Address bits pattern -> x-A6-A5-A4-A3-A2-A1-A0

;;;

(x -> Don't Care, can be 0 or 1; A6-to-A0 -> User defined)

93C56A (ORG=0; An=A8; Dn=D7):

Address bits pattern -> x-A7-A6-A5-A4-A3-A2-A1-A0; User defined

(x -> Don't Care, can be 0 or 1; A7-to-A0 -> User defined)

ERASE/WRITE ENABLE CYCLE (EWEN)

tCS

CS

SK

DI

1 0 0 An An-1

A1 A0

Start Opcode

Address

Bit Bits(2)

Bits(8/9)

High - Z

DO

93C56A (ORG=1; An=A7):

Address bits pattern -> 1-1-x-x-x-x-x-x; (x -> Don't Care, can be 0 or 1)

93C56A (ORG=0; An=A8):

Address bits pattern -> 1-1-x-x-x-x-x-x-x; (x -> Don't Care, can be 0 or 1)

NM93C56A Rev. F.1

8

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