SPT7814BIJ 데이터 시트보기 (PDF) - Signal Processing Technologies
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SPT7814BIJ Datasheet PDF : 11 Pages
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ELECTRICAL SPECIFICATIONS
TA=Tmin - Tmax, VCC=+5.0 V, VEE=-5.2 V, VIN=±2.0 V, VSB=-2.0 V, VST=+2.0 V, fclock=40 MHz, 50% clock duty cycle, unless otherwise specified.
PARAMETERS
TEST
CONDITIONS
TEST
SPT7814A
SPT7814B
LEVEL MIN TYP MAX MIN TYP MAX UNITS
Dynamic Performance
Signal-To-Noise Ratio
(without Harmonics)
fIN=1 MHz
+25 °C
I
TA=Tmin - Tmax
IV
fIN=3.58 MHz
+25 °C
I
TA=Tmin - Tmax
IV
fIN=10.3 MHz
+25 °C
I
TA=Tmin - Tmax
IV
Harmonic Distortion
fIN=1 MHz
+25 °C
I
TA=Tmin - Tmax
IV
fIN=3.58 MHz
+25 °C
I
TA=Tmin - Tmax
IV
fIN=10.3 MHz
+25 °C
I
TA=Tmin - Tmax
IV
Signal-to-Noise and Distortion
fIN=1 MHz
+25 °C
I
TA=Tmin - Tmax
IV
fIN=3.58 MHz
+25 °C
I
TA=Tmin - Tmax
IV
fIN=10.3 MHz
+25 °C
I
TA=Tmin - Tmax
IV
Spurious Free Dynamic Range +25 °C, fIN=1 MHz
V
Differential Phase
+25 °C, fIN=3.58 & 4.35 MHz V
Differential Gain
+25 °C, fIN=3.58 & 4.35 MHz V
55
57
53
55
55
57
53
55
48
50
45
47
54
56
51
53
54
56
51
53
46
48
45
47
52
54
49
52
54
49
44
46
43
67
0.2
0.5
52
54
50
52
52
54
50
52
46
48
43
45
52
54
49
51
52
54
49
51
43
45
41
43
49
51
46
49
51
46
41
43
40
67
0.2
0.7
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
Degree
%
Digital Inputs
Logic 1 Voltage
Logic 0 Voltage
Maximum Input Current Low
Maximum Input Current High
Pulse Width Low (CLK)
Pulse Width High (CLK)
VI
-1.1
-1.1
V
VI
-1.5
-1.5 V
VI
-500 ±200 +750 -500 ±200 +750 µA
VI
-500 ±300 +750 -500 +300 +750 µA
IV
10
10
ns
IV
10
300
10
300 ns
Digital Outputs
Logic 1 Voltage
Logic 0 Voltage
50 Ω to -2 V
50 Ω to -2 V
VI
-1.1 -0.8
-1.1 -0.8
V
VI
-1.8 -1.5
-1.8 -1.5 V
Power Supply Requirements
Voltages VCC
-VEE
Currents ICC
-IEE
Power Dissipation
Outputs Open
Power Supply Rejection Ratio (5 V ±0.25 V, -5.2 V ±2.0 V)
IV +4.75 -5.0 +5.25 +4.75 +5.0 +5.25 V
IV
-4.95 -5.2 -5.45 -4.95 -5.2 -5.45 V
VI
140
170
140 190 mA
VI
115
140
115 160 mA
VI
1.3
1.6
1.3
1.8 W
V
1.0
1.0
LSB
SPT
3
SPT7814
3/11/97
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