NT5SV16M16AT 데이터 시트보기 (PDF) - Unspecified

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NT5SV16M16AT

256Mb Synchronous DRAM

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NT5SV64M4AT(L)

NT5SV32M8AT(L)

NT5SV16M16AT(L)

256Mb Synchronous DRAM

Precharge Termination

The Precharge Command may be used to terminate either a burst read or burst write operation. When the Precharge command

is issued, the burst operation is terminated and bank precharge begins. For burst read operations, valid data will continue to

appear on the data bus as a function of CAS Latency.

Burst Read Interrupted by Precharge

(Burst Length = 8, CAS Latency = 2, 3)

T0

T1

T2

T3

T4

T5

T6

T7

T8

CK

COMMAND READ Ax0

NOP

CAS latency = 2

tCK2, DQs

CAS latency = 3

tCK3, DQs

NOP

NOP

Precharge A

NOP

tRP‡

NOP

*

NOP

DOUT Ax0 DOUT Ax1 DOUT Ax2 DOUT Ax3

tRP‡

*

DOUT Ax0 DOUT Ax1 DOUT Ax2 D O U T A x3

NOP

* Bank A can be reactivated at completion of tRP.

‡ tR P is a function of clock cycle time and speed sort.

See the Clock Frequency and Latency table.

REV 1.0

May, 2001

23

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NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.

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