TDA9150 데이터 시트보기 (PDF) - Philips Electronics
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TDA9150 Datasheet PDF : 36 Pages
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Philips Semiconductors
Programmable deflection controller
Preliminary specification
TDA9150B
PINNING
SYMBOL PIN
DESCRIPTION
HFB
1 horizontal flyback input
DSC
2 display sandcastle input/output
PROT
3 over voltage protection input
AGND
4 analog ground
LLCS
5 line-locked clock selection input
EWOUT 6 east-west geometry output
EHT
7 EHT compensation
RCONV
FLASH
8 external resistive conversion
9 flash detection input
VOUTB
VOUTA
VA
HA
LLC
10 vertical output B
11 vertical output A
12 vertical information input
13 horizontal information input
14 line-locked clock input
DGND
15 digital ground
VCC
SDA
16 supply input (+8 V)
17 serial data input/output
SCL
18 serial clock input
OFCS
19 off-centre shift output
HOUT
20 horizontal output
Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION
Input signals (pins 12, 13, 14, 17 and 18)
The TDA9150B requires three signals for minimum
operation (apart from the supply). These signals are the
line-locked clock (LLC) and the two I2C-bus signals (SDA
and SCL). Without the LLC the device will not operate
because the internal synchronous logic uses the LLC as
the system clock.
I2C-bus transmissions are required to enable the device to
perform its required tasks. Once started the IC will use the
HA and/or VA inputs for synchronization. If the LLC is not
present the outputs will be switched off and all operations
discarded (if the LLC is not present the line drive will be
inhibited within 2 µs, the EW output current will drop to
zero and the vertical output current will drop to 20% of the
adjusted value within 100 µs). The SDA and SCL inputs
meet the I2C-bus specification, the other three inputs are
TTL compatible.
The LLC frequency can be divided-by-two internally by
connecting LLCS (pin 5) to ground thereby enabling the
prescaler.
The LLC timing is given in the Chapter “Characteristics”.
July 1994
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