Pin No. Symbol
26
VREF
Equivalent circuit
AVDD
26
AVSS
CXD1176Q
Description
Clamp reference voltage input.
Clamps to provide a clamp period
input signal equal to the reference
voltage.
27
CCP
28, 31 DVSS
29
CLE
AVDD
27
AVSS
DVDD
29
DVSS
Integrates the voltage for clamp
control.
CCP and VIN voltage changes are in
positive phase.
Digital ground.
CLAMP
PULSE
When CLE is at low, clamp function is
activated.
When CLE is at high, clamp function
is OFF and only the usual A/D
converter function is active.
By connecting CLE pin to DVDD via a
several hundred Ω resistance, the
clamp pulse can be tested.
30
OE
DVDD
30
DVSS
—5—
When OE is at low, Data is output.
When OE ia at high, D0 to D7 pins
turn to high impedance.