JS48F4400P0Y00 데이터 시트보기 (PDF) - Numonyx -> Micron
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JS48F4400P0Y00 Datasheet PDF : 102 Pages
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Numonyx™ Wireless Flash Memory (W18)
10.5 CFI Query .........................................................................................................57
10.6 Read Status Register..........................................................................................57
10.7 Clear Status Register .........................................................................................58
11.0 Program Operations .................................................................................................59
11.1 Word Program ...................................................................................................59
11.2 Factory Programming .........................................................................................60
11.3 Enhanced Factory Program (EFP) .........................................................................61
11.3.1 EFP Requirements and Considerations .......................................................61
11.3.2 Setup....................................................................................................62
11.3.3 Program ................................................................................................62
11.3.4 Verify....................................................................................................62
11.3.5 Exit.......................................................................................................63
12.0 Program and Erase Operations.................................................................................65
12.1 Program/Erase Suspend and Resume ...................................................................65
12.2 Block Erase .......................................................................................................67
12.3 Read-While-Write and Read-While-Erase ...............................................................69
13.0 Security Modes ........................................................................................................71
13.1 Block Lock Operations ........................................................................................71
13.1.1 Lock......................................................................................................72
13.1.2 Unlock...................................................................................................72
13.1.3 Lock-Down ............................................................................................72
13.1.4 Block Lock Status ...................................................................................73
13.1.5 Lock During Erase Suspend ......................................................................73
13.1.6 Status Register Error Checking .................................................................73
13.1.7 WP# Lock-Down Control ..........................................................................74
13.2 Protection Register.............................................................................................74
13.2.1 Reading the Protection Register ................................................................75
13.2.2 Programing the Protection Register ...........................................................75
13.2.3 Locking the Protection Register.................................................................75
13.3 VPP Protection...................................................................................................77
14.0 Set Read Configuration Register ..............................................................................78
14.1 Read Mode (RCR[15]) ........................................................................................79
14.2 First Access Latency Count (RCR[13:11]) ..............................................................79
14.2.1 Latency Count Settings............................................................................80
14.3 WAIT Signal Polarity (RCR[10]) ...........................................................................81
14.4 WAIT Signal Function .........................................................................................81
14.5 Data Hold (RCR[9])............................................................................................82
14.6 WAIT Delay (RCR[8]) .........................................................................................83
14.7 Burst Sequence (RCR[7])....................................................................................83
14.8 Clock Edge (RCR[6]) ..........................................................................................84
14.9 Burst Wrap (RCR[3]) ..........................................................................................84
14.10 Burst Length (RCR[2:0]).....................................................................................85
A Write State Machine States ......................................................................................86
B Common Flash Interface (CFI) .................................................................................89
C Ordering Information ...............................................................................................99
Datasheet
4
November 2007
Order Number: 290701-18
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