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PCA9504A

8-bit I2C and SMBus I/O port with 2-kbit EEPROM

Philips Electronics 

Philips Semiconductors

Glue chip 4

Product data

PCA9504A

FEATURES

• Dual, Strapping, Selectable Feature Sets

• Audio-disable Circuit

• Mute Audio Circuit

• 5 V reference generation

• 5 V standby reference generation

• HD single color LED driver

• IDE reset signal generation/PCIRST# buffers

• PWROK (PWRGD_3V) signal generation

• Power Sequencing / BACKFEED_CUT

• Power Supply turn on circuitry

• RMSRST# generation

• Voltage translation for DDC to VGA monitor

• HSYNCH / VSYNCH voltage translation to VGA monitor

• 3-state buffers for test

• Extra GP Logic gates

• Power LED Drivers

• Flash FLUSH# / INIT# circuit

• 5 V I2C to 3.3 V SMBus conversion to 400 kHz

• Requires both 3.3 V and 5.0 V operating voltages

• 0 to +70 °C operating temperature range

• ESD protection exceeds 1000 V HBM per JESD22-A114 and

750 V CDM per JESD22-C101

• Latch-up testing is done to JEDEC Standard JESD78 which

exceeds 100 mA

• Package offered: TSSOP56

DESCRIPTION

The PCA9504A Glue Chip 4 is a highly integrated and cost-efficient

custom ASIC that reduces logic part count, overall component cost,

and board space requirements for PC designers and manufacturers.

The Glue Chip 4 supports the latest generation of high-volume

platforms based on Intel® processors and chipsets that require

additional external circuitry in order to function properly. It is used on

entry servers/workstations (840 and 860 chipsets), high-end

desktops (820 and 850 chipsets), as well as mid range (815, 830

and 845 chipsets) and low-end (810 chipset) motherboards. Some

of these functionalities include meeting timing specifications,

buffering signals, and switching between power wells.

The PCA9504A Glue Chip 4 integrates miscellaneous motherboard

logic and analog functions into a single, small footprint 56-pin

TSSOP device. The Glue Chip 4 typically resides on the

motherboard close to the I/O controller Hub (ICH) and is optimized

for the Intel 82801BA I/O controller hub (ICH2).

PIN CONFIGURATION

VREF3IN 1

V_5P0_STBY 2

V_3P3_STBY 3

GPO_FLUSH_CACHE/GP1_IN 4

A20M/GP1_INB 5

INIT/GP1_INA 6

FLUSH_OUT_CPU/GP1_OUT 7

INIT_OUT/GP2_OUT 8

CLK_IN 9

SEL_33_66 10

GND 11

PCIRST 12

PCRIST_OUT 13

AUD_EN 14

AUD_RST 15

IDE_RSTDRV 16

3V_DDCSCL 17

5V_DDCSCL 18

3V_DDCSDA 19

5V_DDCSDA 20

CPU_PRESENT 21

SLP_S3 22

PS_ON 23

HD_LED 24

PRIMARY_HD 25

SCSI 26

SECONDARY_HD 27

BACKFEED_CUT 28

56 GP3_OUT

55 GP3_IN

54 STRAP

53 VCCP_VREF

52 VSYNC_5V

51 HSYNC_5V

50 VSYNC_3V

49 HSYNC_3V

48 REF5V_STBY

47 AUD_SHDN

46 MUTE_AUD

45 VREF5IN

44 REF5V

43 GND

42 RSMRST

41 TEST_EN

40 GRN_LED

39 YLW_LED

38 YLW_BLNK

37 GRN_BLNK

36 SLP_S5

35 SCK_BJT_GATE

34 PWRGD_3V

33 FPRST

32 PWRGD_PS

31 FLUSH_OUT_FWH

30 LATCHED_BACKFED_CUT

29 GND

SW00578

ORDERING INFORMATION

PACKAGE

TEMPERATURE RANGE

ORDER CODE

TOPSIDE MARK

56-Pin Plastic TSSOP

0 °C to +70 °C

PCA9504ADGG

PCA9504ADGG

Standard packing quantities and other packaging data are available at www.philipslogic.com/packaging.

DRAWING NUMBER

SOT364-1

2004 May 11

2

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