Philips Semiconductors
LCD controllers/drivers
Product specification
PCF2113x
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
I2C-bus; pins SDA and SCL
VIL
LOW-level input voltage
0
−
VIH
HIGH-level input voltage
0.7VDD1
−
ILI
input leakage current
VI = VDD1 or VSS1
−1
−
Ci
input capacitance
note 6
−
5
IOL (SDA) LOW-level output current on VOL = 0.4 V; VDD1 > 2 V
3
−
pin SDA
VOL = 0.2 VDD1; VDD1 < 2 V 2
−
0.3VDD1 V
5.5
V
+1
µA
−
pF
−
mA
−
mA
LCD outputs
RO(ROW)
row output resistance of
pins R1 to R18
note 7
−
10 30
kΩ
RO(COL)
column output resistance of
pins C1 to C60
note 7
−
15 40
kΩ
Vbias(tol)
bias voltage tolerance on
note 8
pins R1 to R18 and C1 to C60
−
20 130
mV
VLCD2(tol) VLCD voltage tolerance
Tamb = 25 °C; note 5
VLCD < 3 V
−
VLCD < 4 V
−
VLCD < 5 V
−
VLCD < 6 V
−
TC0
VLCD temperature coefficient 0
−
TC1
VLCD temperature coefficient 1
−
TC2
VLCD temperature coefficient 2
−
TC3
VLCD temperature coefficient 3
−
−
160
mV
−
200
mV
−
260
mV
−
340
mV
−0.16 −
%/K
−0.18 −
%/K
−0.21 −
%/K
−0.24 −
%/K
Notes
1. Spikes on VDD1 or VSS1 which cause VDD1 − VSS1 ≤ 1.6 V can cause a Power-on reset.
2. Resets all logic when VDD1 < VPOR; 3 OSC cycles required.
3. LCD outputs are open-circuit; inputs at VDD1 or VSS1; bus inactive.
4. Tamb = 25 °C; fOSC = 200 kHz.
5. LCD outputs are open-circuit; VLCD generator is on; load current IVLCD = 5 µA (at VLCD).
6. Tested on sample basis.
7. Resistance of output pins (R1 to R18 and C1 to C60) with a load current of 10 µA; outputs measured one at a time;
external VLCD = 3 V, VDD1, 2, 3 = 3 V.
8. LCD outputs open-circuit; external VLCD.
2001 Dec 19
40