PCF2113 데이터 시트보기 (PDF) - NXP Semiconductors.

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PCF2113

LCD controllers/drivers

NXP Semiconductors. 

NXP Semiconductors

PCF2113x

LCD controllers/drivers

There are 4 types of instructions:

• Designate PCF2113x functions such as display format, data length

• Set internal RAM addresses

• Perform data transfer with internal RAM

• Other functions

In normal use, data transfer instructions are used most frequently. However, automatic

incrementing by 1 (or decrementing by 1) of internal RAM addresses after each data write

lessens the microcontroller program load. The display shift in particular can be performed

concurrently with display data write, enabling the designer to develop systems in minimum

time with maximum programming efficiency.

During internal operation, no instructions other than the ‘read busy flag’ and ‘read

address’ instructions will be executed. Because the busy flag is set to logic 1 while an

instruction is being executed, check to ensure it is logic 0 before sending the next

instruction or wait for the maximum instruction execution time, as given in Table 10. An

instruction sent while the busy flag is logic 1 will not be executed.

Table 10. Instruction set with parallel bus commands

Instruction

Control and command bits

Description[1]

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

Required

clock

cycles

H = 0 or 1 (basic and extended functions)

NOP

0 0 0 0 0 0 0 0 0 0 no operation

3

Function set 0 0 0 0 1 DL 0 M SL H sets interface Data

3

Length (DL), number of

display lines (M), single

line/MUX 1:9 (SL) and

extended instruction set

control (H)

Read busy flag 0 1 BF AC

and address

counter

reads the Busy Flag (BF), 0

indicating internal operating

is being performed, and the

Address Counter (AC)

Read data

1 1 read data

reads data from CGRAM or 3

DDRAM

Write data

1 0 write data

writes data to CGRAM or 3

DDRAM

H = 0 (basic functions)

Clear display 0 0 0 0 0 0 0 0 0 1 clears entire display and sets 165

DDRAM address 0 in

address counter

Return home 0 0 0 0 0 0 0 0 1 0 sets DDRAM address 0 in 3

address counter; also

returns shifted display to

original position; DDRAM

contents remain unchanged

PCF2113_FAM_4

Product data sheet

Rev. 04 — 4 March 2008

© NXP B.V. 2008. All rights reserved.

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