PCF2129T 데이터 시트보기 (PDF) - NXP Semiconductors.
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PCF2129T Datasheet PDF : 73 Pages
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Table 5. Register overview
Bit positions labeled as - are not implemented and will return 0 when read. Bits labeled as T must always be written with logic 0. Bits labeled as X are undefined at
power-on and unchanged by subsequent resets.
Address Register name Bit
Reset value Reference
7
6
5
4
3
2
1
0
Control registers
00h
Control_1
EXT_ T
TEST
STOP TSF1 POR_ 12_24 MI
SI
0000 0000 Table 6 on page 9
OVRD
01h
Control_2
MSF
WDTF TSF2 AF
T
TSIE
AIE
T
0000 0000 Table 7 on page 10
02h
Control_3
PWRMNG[2:0]
BTSE BF
BLF
BIE
BLIE
0000 0000 Table 8 on page 11
Time and date registers
03h
Seconds
OSF
SECONDS (0 to 59)
1XXX XXXX Table 16 on page 24
04h
Minutes
-
MINUTES (0 to 59)
- XXX XXXX Table 18 on page 24
05h
Hours
-
-
AMPM HOURS (1 to 12) in 12 h mode
- - XX XXXX Table 19 on page 25
HOURS (0 to 23) in 24 h mode
- - XX XXXX
06h
Days
-
-
DAYS (1 to 31)
- - XX XXXX Table 20 on page 25
07h
Weekdays
-
-
-
-
-
WEEKDAYS (0 to 6)
- - - - - XXX Table 21 on page 25
08h
Months
-
-
-
MONTHS (1 to 12)
- - - X XXXX Table 23 on page 26
09h
Years
YEARS (0 to 99)
XXXX XXXX Table 25 on page 26
Alarm registers
0Ah
Second_alarm
AE_S SECOND_ALARM (0 to 59)
1XXX XXXX Table 26 on page 28
0Bh
Minute_alarm
AE_M MINUTE_ALARM (0 to 59)
1XXX XXXX Table 27 on page 29
0Ch
Hour_alarm
AE_H -
AMPM HOUR_ALARM (1 to 12) in 12 h mode
1 - XX XXXX Table 28 on page 29
HOUR_ALARM (0 to 23) in 24 h mode
1 - XX XXXX
0Dh
Day_alarm
AE_D -
DAY_ALARM (1 to 31)
1 - XX XXXX Table 29 on page 29
0Eh
Weekday_alarm AE_W -
-
-
-
WEEKDAY_ALARM (0 to 6) 1 - - - - XXX Table 30 on page 30
CLKOUT control register
0Fh
CLKOUT_ctl
TCR[1:0]
-
-
-
COF[2:0]
00 - - - 000 Table 9 on page 12
Watchdog registers
10h
Watchdg_tim_ctl WD_CD T
TI_TP -
-
-
TF[1:0]
000 - - - 11 Table 31 on page 31
11h
Watchdg_tim_val WATCHDG_TIM_VAL[7:0]
XXXX XXXX Table 32 on page 31
Timestamp registers
12h
Timestp_ctl
TSM
TSOFF -
1_O_16_TIMESTP[4:0]
00 - X XXXX Table 38 on page 36
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