PCF8594C-2 데이터 시트보기 (PDF) - Philips Electronics
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PCF8594C-2 Datasheet PDF : 21 Pages
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Philips Semiconductors
PCF8594C-2
512 × 8-bit CMOS EEPROM with I2C-bus interface
7. Device addressing
Table 5: Device address code
Selection
Device code
Bit
b7[1]
b6
b5
b4
Device
1
0
1
0
[1] The Most Significant Bit (MSB) ‘b7’ is sent first.
Chip Enable
R/W
b3
b2
b1
b0
A2
A1
A0
R/W
A2 and A1 are hardware selectable pins and A0 is software selectable pin.
A system could have up to four PCF8594C-2 devices on the same I2C-bus,
equivalent to a 16 kbit EEPROM or 4 devices of 512 bytes of memory.
A0 selects the lower (logic level ‘0’) or the higher (logic level ‘1’) 256-byte page on the
selected device. The device is selected by bits A2 and A1. Figure 3 shows the various
address and page combinations.
I2C-BUS
PCF8594C-2
DEVICE 1
A2 A1 A0
HIGHER 256-BYTE PAGE 0
0
1
LOWER 256-BYTE PAGE 0
0
0
PCF8594C-2
DEVICE 2
HIGHER 256-BYTE PAGE 0
1
1
LOWER 256-BYTE PAGE 0
1
0
PCF8594C-2
DEVICE 3
HIGHER 256-BYTE PAGE 1
0
1
LOWER 256-BYTE PAGE 1
0
0
Fig 3. Device addressing.
PCF8594C-2
DEVICE 4
HIGHER 256-BYTE PAGE 1
1
1
LOWER 256-BYTE PAGE 1
1
0
002aaa260
9397 750 14221
Product data
Rev. 05 — 25 October 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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