PCF8563T 데이터 시트보기 (PDF) - NXP Semiconductors.
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PCF8563T Datasheet PDF : 45 Pages
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NXP Semiconductors
PCF8563
Real-time clock/calendar
8.4 Time and date registers
The majority of the registers are coded in the BCD format to simplify application use.
8.4.1 Register VL_seconds
Table 8. VL_seconds - seconds and clock integrity status register (address 02h) bit
description
Bit Symbol Value Place value Description
7
VL
0
-
clock integrity is guaranteed
1[1]
-
integrity of the clock information is not guaranteed
6 to 4 SECONDS 0 to 5 ten’s place actual seconds coded in BCD format, see Table 9
3 to 0
0 to 9 unit place
[1] Start-up value.
Table 9. Seconds coded in BCD format
Seconds value
(decimal)
Upper-digit (ten’s place)
Bit 6
Bit 5
Bit 4
00
0
0
0
01
0
0
0
02
0
0
0
:
:
:
:
09
0
0
0
10
0
0
1
:
:
:
:
58
1
0
1
59
1
0
1
Digit (unit place)
Bit 3
Bit 2
0
0
0
0
0
0
:
:
1
0
0
0
:
:
1
0
1
0
Bit 1
0
0
1
:
0
0
:
0
0
Bit 0
0
1
0
:
1
0
:
0
1
8.4.1.1 Voltage-low detector and clock monitor
The PCF8563 has an on-chip voltage-low detector (see Figure 7). When VDD drops below
Vlow, bit VL in the VL_seconds register is set to indicate that the integrity of the clock
information is no longer guaranteed. The VL flag can only be cleared by using the
interface.
VDD
mgr887
period of battery
operation
normal power
operation
PCF8563
Product data sheet
Vlow
Fig 7. Voltage-low detection
VL set
t
All information provided in this document is subject to legal disclaimers.
Rev. 9 — 16 June 2011
© NXP B.V. 2011. All rights reserved.
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