HT48RA0A 데이터 시트보기 (PDF) - Holtek Semiconductor

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HT48RA0A

8-Bit Remote Type MCU

Holtek Semiconductor 

HT48RA0A

higher-order byte to TBLH (08H). Only the destination

of the lower-order byte in the table is well-defined, the

other bits of the table word are transferred to the lower

portion of TBLH, the remaining 2 bits are read as ²0².

The Table Higher-order byte register (TBLH) is read

only. The table pointer (TBLP) is a read/write register

(07H), where P indicates the table location. Before ac-

cessing the table, the location must be placed in

TBLP. The TBLH is read only and cannot be restored.

All table related instructions need 2 cycles to complete

the operation. These areas may function as normal

program memory depending upon the requirements.

Stack Register - STACK

This is a special part of the memory used to save the

contents of the program counter (PC) only. The stack is

organized into one level and is neither part of the data

nor part of the program space, and is neither readable

nor writeable. The activated level is indexed by the stack

pointer (SP) and is neither readable nor writeable. At a

subroutine call the contents of the program counter are

pushed onto the stack. At the end of a subroutine sig-

naled by a return instruction (RET), the program counter

is restored to its previous value from the stack. After a

chip reset, the SP will point to the top of the stack.

If the stack is full and a ²CALL² is subsequently exe-

cuted, stack overflow occurs and the first entry will be

lost (only the most recent return address is stored).

Data Memory - RAM

The data memory is designed with 42´8 bits. The data

memory is divided into two functional groups: special

function registers and general purpose data memory

(32´8). Most of them are read/write, but some are read

only.

The special function registers include the indirect ad-

dressing register (00H), the memory pointer register

(MP;01H), the accumulator (ACC;05H) the program

counter lower-order byte register (PCL;06H), the table

pointer (TBLP;07H), the table higher-order byte register

(TBLH;08H), the status register (STATUS;0AH) and the

I/O registers (PA;12H, PB;14H, PC;16H). The remaining

space before the 20H is reserved for future expanded

usage and reading these locations will return the result

00H. The general purpose data memory, addressed

from 20H to 3FH, is used for data and control informa-

tion under instruction command.

All data memory areas can handle arithmetic, logic, in-

crement, decrement and rotate operations directly. Ex-

cept for some dedicated bits, each bit in the data

memory can be set and reset by the SET [m].i and CLR

[m].i instructions, respectively. They are also indirectly

accessible through memory pointer register (MP;01H).

00H

In d ir e c t A d d r e s s in g R e g is te r

01H

MP

02H

03H

04H

05H

ACC

06H

PCL

07H

TB LP

08H

TB LH

09H

0A H

STATU S

0B H

0C H

0D H

0E H

0FH

10H

11H

12H

PA

13H

14H

PB

15H

16H

PC

17H

18H

19H

1A H

1B H

1C H

1D H

1E H

1FH

20H

G e n e ra l P u rp o s e

D ATA M EM O R Y

(3 2 B y te s )

3FH

S p e c ia l P u r p o s e

D ATA M EM O R Y

:U nused

R e a d a s "0 0 "

RAM mapping

Indirect Addressing Register

Location 00H is an indirect addressing register that is

not physically implemented. Any read/write operation of

[00H] accesses data memory pointed to by MP (01H).

Reading location 00H itself indirectly will return the re-

sult 00H. Writing indirectly results in no operation.

The memory pointer register MP (01H) is a 6-bit register.

The bit 7~6 of MP is undefined and reading will return

the result ²1². Any writing operation to MP will only trans-

fer the lower 6-bit data to MP.

Accumulator

The accumulator closely relates to ALU operations. It is

also mapped to location 05H of the data memory and is

capable of carrying out immediate data operations. Data

movement between two data memory locations has to

pass through the accumulator.

Rev. 1.70

5

July 16, 2003

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