PEB 20324
PEF 20324
Introduction
1.3
Typical Applications
The MUNICH128X provides protocol processing and host memory buffer management
for four independent T1/E1 PRI ports. As such, the MUNICH128X fits into a system
between the framer or LIU/framer devices (e.g., the Siemens FALC®54/FALC®54-LH
transceiver) and the host bus (e.g. PCI Bus), as illustrated in Figure 1-3.
The MUNICH128X provides four independent Serial PCM ports which connect directly
into the framer devices. In PCI based systems a dedicated microcontroller or PCI bridge
chip is necessary to configure the framer or LIU/framer devices.
Additionally, the MUNICH128X provides a PCI 2.1 interface which connects directly to
the system PCI bus. Optionally, this bus can be configured in De-multiplexed Mode.
T1/E1/PRI
FALC R 54 /
FALC R -LH
Transceiver
T1/E1/PRI
FALC R 54 /
FALC R -LH
Transceiver
T1/E1/PRI
FALC R 54 /
FALC R -LH
Transceiver
T1/E1/PRI
FALC R 54 /
FALC R -LH
Transceiver
Dedicated
CPU
MUNICH128X
PCI BUS
PCI Bridge
Chip
Host
Memory
Processor
ITS10009
Figure 1-3 System Integration of the MUNICH128X in PCI-Based System
Hardware Reference Manual
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