MB89T857P-SH 데이터 시트보기 (PDF) - Fujitsu

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MB89T857P-SH

8-bit Proprietary Microcontroller

Fujitsu 

MB89860/850 Series

s PRODUCT LINEUP

Part number

Parameter

Classification

ROM size

RAM size

CPU functions

Ports

Timer unit

8-bit PWM timer 1,

8-bit PWM timer 2

UART

8-bit serial I/O

10-bit A/D converter

External interrupt

Standby modes

Process

Operating voltage*

MB89855

MB89T855

MB89865

MB89857

MB89867

MB89P857 MB89P867

MB89W857 MB89W867

Mass production products (mask ROM products)

One-time PROM pruducts/

EPROM products, also

used for evaluation

16 K × 8 bits

(internal mask ROM)

Note: In MB89T855, no

internal ROM can be used but

external ROM is used.

32 K × 8 bits

(internal mask ROM)

32 K × 8 bits

(internal PROM,

programming with general-

purpose EPROM

programmer)

512 × 8 bits

1 K × 8 bits

Number of instructions:

Instruction bit length:

Instruction length:

Data bit length:

Minimum execution time:

Interrupt processing time:

136

8 bits

1 to 3 bytes

1, 8, 16 bits

0.4 µs/10 MHz

3.6 µs/10 MHz

Input ports:

5 (All also serve as peripherals)

Output ports (N-ch open drain): 8 (All also serve as peripherals)

I/O ports (N-ch open drain): 15 (MB89860 series only)

Output ports (CMOS):

8 (All also serve as bus control pins)

I/O ports (CMOS):

32 (All also serve as bus pins or peripherals)

Total:

68 (53 pins for MB89850 series)

10-bit up/down count timer × 1

Compare registers with buffer × 4

Compare timer unit clear register with buffer × 1

Zero detection pin control

4 output channels

Non-overlap three-phase waveform output

Independent three-phase dead-time timer

8-bit reload timer operation (toggled output capable, operating clock cycle: 0.4 µs to

25.6 µs)

8-bit resolution PWM operation (conversion cycle: 102 µs to 6.528 ms)

8 bits

Clock synchronous/asynchronous data transfer capable

8 bits

LSB first/MSB first selectability

One clock selectable from four transfer clocks

(one external shift clock, three internal shift clocks: 0.8 µs, 3.2 µs, 12.8 µs)

10-bit resolution × 8 channels

A/D conversion time: 13.2 µs

Continous activation by a compare channel 0 in timer unit or an external activation capable

4 independent channels (edge selection, interrupt vector, source flag)

Rising edge/falling edge selectability.

Used also for wake-up from stop/sleep mode. (Edge detection is also permitted in stop mode.)

Sleep mode, stop mode

CMOS

2.7 V to 6.0 V

2.7 V to 5.5 V

* : Varies with conditions such as the operating frequency. (See section “s Electrical Characteristics.”)

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