SY100S341JZTR 데이터 시트보기 (PDF) - Micrel

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SY100S341JZTR

8-BIT SHIFT REGISTER

Micrel 

Micrel, Inc.

TIMING DIAGRAMS

Pn, Sn, Dn

tS

CLOCK

50%

tH

50%

–0.95V

–1.69V

–0.95V

–1.69V

Set-up and Hold Times

Notes:

1. VEE = –4.2V to –5.5V unless otherwise specified; VCC = VCCA = GND.

2. tS is the minimum time before the transition of the clock that information must be present at the data input.

3. tH is the minimum time after the transition of the clock that information must remain unchanged at the data input.

SY100S341

M9999-032206

hbwhelp@micrel.com or (408) 955-1690

6

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