PIC16C432T-ISS 데이터 시트보기 (PDF) - Microchip Technology

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PIC16C432T-ISS

OTP 8-Bit CMOS MCU with LIN Transceiver

Microchip Technology 

3.0 MEMORY ORGANIZATION

3.1 Program Memory Organization

The PIC16C432 has a 13-bit program counter capable

of addressing an 8K x 14 program memory space. Only

the first 2K x 14 (0000h - 07FFh) are implemented for

the PIC16C432. Accessing a location above these

boundaries will cause a wrap-around within the first 2K

x 14 space. The RESET Vector is at 0000h and the

Interrupt Vector is at 0004h (Figure 3-1).

FIGURE 3-1:

PROGRAM MEMORY MAP

AND STACK FOR THE

PIC16C432

PC<12:0>

CALL, RETURN

13

RETFIE, RETLW

Stack Level 1

Stack Level 2

Stack Level 8

RESET Vector

000h

PIC16C432

3.2 Data Memory Organization

The data memory (Figure 3-2) is partitioned into two

Banks, which contain the General Purpose Registers

and the Special Function Registers. Bank 0 is selected

when the RP0 bit is cleared. Bank 1 is selected when

the RP0 bit (STATUS <5>) is set. The Special Function

Registers are located in the first 32 locations of each

Bank. Register locations 20-7Fh (Bank 0) and A0-BFh

(Bank 1) are General Purpose Registers implemented

as static RAM. Some special purpose registers are

mapped in Bank 1. In the microcontroller, address

space F0h-FFh (Bank 1) is mapped to 70-7Fh (Bank 0)

as common RAM.

3.2.1

GENERAL PURPOSE REGISTER

FILE

The register file is organized as 128 x 8 in the

PIC16C432. Each is accessed either directly or indi-

rectly through the File Select Register FSR

(Section 3.4).

Interrupt Vector

On-chip Program

Memory

0004h

0005h

07FFh

0800h

1FFFh

 2000-2013 Microchip Technology Inc.

Preliminary

DS41140C-page 7

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