HI1177 데이터 시트보기 (PDF) - Intersil
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HI1177 Datasheet PDF : 8 Pages
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HI1177
Application Circuit
Y OUT
200
200
C OUT
Y IN
DVDD
AVDD
0.1µF
AVSS
AVSS
AVSS
AVDD
1K
(LSB)
32 31 30 29 28 27 26 25
1
24
2
23
3
22
4
21
5
20
AVSS
3.3K
AVSS
0.1µF
DVSS
6
19
7
(MSB)
8
9
18
17
10 11 12 13 14 15 16
DVSS
CLOCK
(LSB)
(MSB)
C IN
FIGURE 11.
Operation
• How to select the output resistance:
- The HI1177 is a D/A converter of the current output type.
To obtain the output voltage connect the resistance to IO
pin (Y0, C0). For specifications we have:
Output full scale voltage
Output full scale current
VFS = less than 2V
IFS = less than 15mA
- Calculate the output resistance value from the relation
of VFS = IFS X R. Also, 16 times resistance of the output
resistance is connected to reference current pin IREF. In
some cases, however, this turns out to be a value that
does not actually exist. In such a case a value close to it
can be used as a substitute. Here please note that VFS
becomes VFS = VREF X 16R/R’. R is the resistance
connected to IO while R’ is connected to IREF. Increas-
ing the resistance value can curb power consumption.
On the other hand glitch energy and data settling time
will inversely increase. Set the most suitable value
according to the desired application.
• Phase relation between data and clock:
- To obtain the expected performance as a D/A converter, it
is necessary to set properly the phase relation between
data and clock applied from the exterior. Be sure to
satisfy the provisions of the set up time (tS) and hold time
(tH) as stipulated in the Electrical Characteristics.
• VDD, VSS:
- To reduce noise effects separate analog and digital
systems in the device periphery. For VDD pins, both
digital and analog, bypass respective GNDs by using a
ceramic capacitor of about 0.1µF, as close as possible
to the pin.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
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