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HI5714 데이터 시트보기 (PDF) - Intersil

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HI5714 Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Functional Block Diagram
VCCA
7
VRT 9
HI5714
CLK
16
CLOCK DRIVER
VIN 8
VRB 4
ANALOG TO DIGITAL
CONVERTER
LATCHES
OGND 20
6
AGND
17
DGND
OVERFLOW/UNDERFLOW
LATCH
VCCD
OE
18
22
TTL OUTPUTS
12 D7
13 D6
14 D5
15 D4
23 D3
24 D2
1 D1
2 D0
19 VCCO1
21 VCCO2
TTL OUTPUT
11 O/UF
Typical Application Schematic
+5VA
VIN
3.6V
+-
CLOCK
0.1
1.3V
+-
+-
+5VA
0.1
1nF
16
CLK
9
VRT
4
VRB
22
OE
8
VIN
7
0.1µF
5
6
VCCA
NC
AGND
HI5714
2
D0
1
D1
24
D2
23
D3
15
D4
14
D5
13
D6
12
D7
11
O/UF
19
VCCO
VCCO
VCCD
21
18
1nF
0.1µF
OGND
NC
DGND
NC
20
3
17
10
+5VD
DGND
AGND
BNC
1nF and 0.1µF CAPS are placed
as close to part as possible.
NOTES:
1. Pin 5 should be connected to AGND and pins 3 and 10 to DGND to reduce noise coupling into the device.
2. Analog and Digital supplies should be separated and decoupled to reduce digital noise coupling into the analog supply.
2

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