HI2302 데이터 시트보기 (PDF) - Intersil
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HI2302 Datasheet PDF : 16 Pages
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HI2302
Electrical Specifications fC = 50 MSPS, AVDD = 5V, DVDD = 3 to 5.5V, VRB = 0.5V, VRT = 2.5V, TA = 25oC (Continued)
PARAMETER
DC CHARACTERISTICS
Supply Current
Analog
Digital
Reference Current
Reference Resistance
(VRT - VRB)
Self-Bias Voltage
Input Capacitance
Output Capacitance
Digital Input Voltage
Digital Input Current
SYMBOL
TEST CONDITIONS
NOTES MIN
fC = 50 MSPS, AVDD = 5V, DVDD = 5V or 3.3V, VRB = 0.5V, VRT = 2.5V, TA = 25oC
IAD + IDD NTSC Ramp,
DVDD = 5V
-
IAD
Wave Input,
CLE = 0V
DVDD = 3.3V
-
IDD
-
IREF
4.1
RREF
260
VRB
VRT - VRB
CAI1
CAI2
CDIN
CAO
CDO
VIH
VIL
IIH
IIL
Shorts VRTS and AVDD
Shorts VRBS and AVSS
VIN, VIN = 1.5V + 0.07VRMS
VRTS, VRT, VRB, VRBS, VREF
TEST, CLK, CLP, CLE, OE
CCP
D0 to D7, TEST
AVDD = 4.75 to 5.25V,
DVDD = 3 to 5.5V, TA = -20oC to 75oC
VTAI ==02V0otoCAtoVD75Do,C
CLK
TEST, CLP, CLE
0.52
1.80
-
-
-
-
-
2.2
-
-240
-240
TYP
25
23
2
5.4
370
0.56
1.92
15
-
-
-
-
-
-
-
-
MAX UNITS
36
mA
33
mA
3
mA
7.7
mA
480
Ω
0.60
V
2.04
V
-
pF
11
pF
11
pF
11
pF
11
pF
-
V
0.8
V
240
µA
40
µA
OE
-40
-
240
µA
Digital Output Current
IOH
OE = 0V, DVDD = 5V VOH = DVDD - 0.8V
IOL
TA = 20oC to 75oC
VOL = 0.4V
-
-
-2
mA
4
-
-
mA
IOH
OE = 0V
VOH = DVDD - 0.8V
IOL
DTAVD=D-2=0o3C.3Vto 75oC
VOL = 0.4V
-
-
-1.2
mA
2.4
-
-
mA
TIMING
IOZH OE = 3V
VOH = DVDD
IOZL
DVDD = 3 to 5.5V
TA = -20oC to 75oC
VOL = 0V
fC = 50 MSPS, AVDD = 5V, DVDD = 5V or 3.3V, VRB = 0.5V, VRT = 2.5V, TA = 25oC
-40
-
40
µA
-40
-
40
µA
Output Data Delay
tPZH
tPHL
CL = 15pF
OE = 0V
DVDD = 5V
5.5
9.5
12.0
ns
8.5
ns
tPLH
DVDD = 3.3V
4.3
11.8 16.3
ns
tPHL
7.6
ns
Three-State Output Enable
Time
tPZH
tPZL
tPZH
RL = 1kΩ
CL = 15pF
OE = 3V➝0V
DVDD = 5V
DVDD = 3.3V
2.5
4.5
8.0
ns
6.0
ns
3.0
7.0
9.0
ns
tPZL
5.0
ns
Three-State Output Enable
Time
tPHZ, tPLZ RL = 1kΩ, CL = 15pF
tPZH, tPZL OE = 3V➝0V
DVDD = 5V
DVDD = 3.3V
3.5
5.5
7.5
ns
2.5
5.5
8.0
ns
Clamp Pulse Width
tCPW fC = 14.3MHz, CIN = 10µF for NTSC Wave
Note 4 1.75 2.75 3.75
µs
NOTES:
2. The offset voltage EOB is a potential difference between VRB and a point of position where the voltage drops equivalent to 1/2 LSB of the voltage
wvohletangteherisoeustpeuqtudivaatalencht atong1/e2sLfrSoBmo“f0t0h0e0v0o0lt0a0g”etow“h0e0n00th0e00o1u”tp. uEtOdTaitsa
a potential difference between VRT and a
changes from “11111111” to “11111110”.
potential
point
where
the
3. The voltage of up to (AVDD + 0.5V) can be input when DVDD = 3.3V. But the output pin voltage is less than the DVDD voltage. When the digital
output is in the high impedance mode, the IC may be damaged by applying the voltage which is more than the (DVDD + 0.5V) voltage to the
digital output.
4. The clamp pulse width is for NTSC as an example. Adjust the rate to the clamp pulse cycle (1/15.75kHz for NTSC) for other processing systems
to equal the values for NTSC.
4
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