PLL130-07 데이터 시트보기 (PDF) - PhaseLink Corporation
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PLL130-07 Datasheet PDF : 5 Pages
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PLL130-07
High Speed Translator Buffer to CMOS (Selectable Drive)
PACKAGE INFORMATION
Symbol
A
A1
B
C
D
E
H
L
e
8 PIN ( dimensions in mm )
Narrow SOIC
Min.
Max.
1.47
1.73
0.10
0.25
0.33
0.51
0.19
0.25
4.80
4.95
3.80
4.00
5.80
6.20
0.38
1.27
1.27 BSC
EH
D
A
1
C
B
e
A
L
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/09/04 Page 4
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