PM5351-BI 데이터 시트보기 (PDF) - PMC-Sierra
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PM5351-BI Datasheet PDF : 393 Pages
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S/UNI-TETRA
DATASHEET
PMC-1971240
ISSUE 7
PMC-Sierra, Inc.
PM5351 S/UNI-TETRA
SATURN USER NETWORK INTERFACE (155-TETRA)
CONTENTS
1
FEATURES .............................................................................................................. 1
1.1 GENERAL.................................................................................................... 1
1.2 THE SONET RECEIVER............................................................................... 2
1.3 THE RECEIVE ATM PROCESSOR................................................................ 3
1.4 THE RECEIVE POS PROCESSOR ............................................................... 3
1.5 THE SONET TRANSMITTER ........................................................................ 4
1.6 THE TRANSMIT ATM PROCESSOR.............................................................. 4
1.7 THE TRANSMIT POS PROCESSOR............................................................. 5
2
APPLICATIONS ........................................................................................................ 6
3
REFERENCES ......................................................................................................... 7
4
DEFINITIONS........................................................................................................... 9
5
APPLICATION EXAMPLES ..................................................................................... 12
6
BLOCK DIAGRAM .................................................................................................. 16
7
DESCRIPTION ....................................................................................................... 18
8
PIN DIAGRAM........................................................................................................ 21
9
PIN DESCRIPTION................................................................................................. 23
9.1 LINE SIDE INTERFACE SIGNALS............................................................... 23
9.2 SECTION AND LINE STATUS DCC SIGNALS .............................................. 27
9.3 ATM (UTOPIA) AND PACKET OVER SONET (POS-PHY) SYSTEM
INTERFACE ............................................................................................... 29
9.4 MICROPROCESSOR INTERFACE SIGNALS .............................................. 51
9.5 JTAG TEST ACCESS PORT (TAP) SIGNALS ............................................... 52
9.6 ANALOG SIGNALS..................................................................................... 53
9.7 POWER AND GROUND.............................................................................. 54
10
FUNCTIONAL DESCRIPTION................................................................................. 61
10.1 RECEIVE LINE INTERFACE (CRSI) ............................................................ 61
10.1.1
CLOCK RECOVERY................................................................. 61
10.1.2
SERIAL TO PARALLEL CONVERTER ....................................... 62
10.2 RECEIVE SECTION OVERHEAD PROCESSOR (RSOP)............................. 62
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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