PM73121-RI 데이터 시트보기 (PDF) - PMC-Sierra

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PM73121-RI

AAL1 Segmentation And Reassembly Processor

PMC-Sierra 

Data Sheet

PMC-980620

,VVXH 

PMC-Sierra, Inc.

PM73121 AAL1gator II

AAL1 SAR Processor

WHAT’S NEW IN THIS DATA SHEET?

This revision history documents the changes that occur from one data sheet version to the next version.

From Version

Issue 2

To Version

Issue 3

Major Changes

• Corrected the Function description in section 7.8.12

“R_OAM_QUEUE”, on page 163.

• Removed “Preliminary” from the headers.

• Removed the “P” suffix from the part number in Appendix 29,

“Ordering Information”, on page 205.

• Changed the following timing parameters:

• Interrupt Timing: PROC_INTR Tq(max) from 16.5 ns to 17

ns.

• Microprocessor RAM Read Cycle: /MEM_CS Tq(max)

from 17.7 ns to 18 ns.

• Microprocessor RAM Read Cycle: Tqmoe(max) from 24.7

ns to 25 ns.

• Microprocessor RAM Write Cycle: /PROC_ACK Tq(max)

from 17.5 ns to 18 ns.

• Microprocessor RAM Write Cycle: /MEM_CS Tq(max)

from 17.7 ns to 18 ns.

• Microprocessor Write Command Register: /PROC_ACK

Tq(max) from 17.5 ns to 18 ns.

• Transmit Side Interface: RL_SER Th(min) from 1.2 ns to 2

ns.

• Transmit Side High-Speed Interface: RL_SER Th(min) from

1.2 ns to 2 ns.

• Transmit UTOPIA ATM Timing: TATM_DATA Tq(max)

from 12.7 ns to 13 ns.

• TUTOPIA SPHY Timing: RPHY_DATA Tq(max) from

12.7 ns to 13 ns.

• TUTOPIA MPHY Timing: RPHY_DATA Tq(max) from

12.7 ns to 13 ns.

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