T-51512D121-FW-A-AA 데이터 시트보기 (PDF) - Optrex Corporation
부품명
상세내역
제조사
T-51512D121-FW-A-AA Datasheet PDF : 20 Pages
| |||
5. INTERFACE TIMING
(1) Timing Specifications
VCC = 3.3/5.0 V, Ta = 25℃
ITEM
SYMBOL MIN
TYP
MAX
UNIT
DCLK *1,4)
Frequency
Period
Low Width
High Width
fCLK
35
tCLK
25
tWCL
10
tWCH
10
--
40
MHz
--
27.8
ns
--
--
ns
--
--
ns
DATA *1) Set up time
(R,G,B,DENA,
HD, VD) Hold time
tDS
4
--
--
ns
tDH
4
--
--
ns
DENA*3)
HD*2,4)
VD*2)
[Note]
Horizontal Active Time
Horizontal Front Porch
Horizontal Back Porch
Vertical Active Time
Vertical Front Porch
Vertical Back Porch
Frequency
Period
Low Width
Frequency
Period
Low Width
tHA
tHFP
tHBP
tVA
tVFP
tVBP
fH
tH
tWHL
fV
tV
tWVL
800
0
10
600
1
2
35.2
25.5
5
55
15.6
1
800
--
--
600
--
--
37.9
26.4
--
60.3
16.6
--
800
--
600
--
39.2
28.4
--
64.2
18.2
--
tCLK
tCLK
tCLK
tH
tH
tH
kHz
µs
tCLK
Hz
ms
tH
*1) DATA is latched at fall edge of DCLK in this specification.
*2) Polarities of HD and VD are negative in this specification.
*3) DENA (Data Enable) should always be positive polarity as shown in the timing specification.
*4) DCLK should appear during all invalid period, and HD should appear during invalid period of
frame cycle.
T-51512D121-FW-A-AA (AA) No. 2002-0169
OPTREX CORPORATION
Page 9/35
Share Link: 