ADSP-21MOD980N-000 데이터 시트보기 (PDF) - Analog Devices
부품명
상세내역
제조사
ADSP-21MOD980N-000 Datasheet PDF : 42 Pages
| |||
PRELIMINARY TECHNICAL DATA
ADSP-21mod980N For current information contact Analog Devices at (800) ANALOGD
ARCHITECTURE OVERVIEW
Figure 2 on page 4 is a functional block diagram of the
ADSP-21mod980N. It contains eight independent digital
signal processors.
17
DATA<23:8>, A<0>
CLKIN
IAD<15:0>, IDMA CNTL
20
3
PF<0:2>/MODE A:C
IAD <15:0>,
IDMA CNTL
20
SPORT0A
SPORT1
EMULATOR
2188N
DSP 1
4
4
8
2188N
DSP 2
2188N
DSP 3
2188N
DSP 4
2188N
DSP 5
2188N
DSP 6
2188N
DSP 7
2188N
DSP 8
4
SPORT0B
SIGNALS ROUTED TO EACH RESPECTIVE DIE
BR <8:1>
8
8
BG <8:1>
8
RESET <8:1>
8
CLKOUT <8:1>
8
EE <8:1>
8
IS <8:1>
8
TFS0 <8:1>
8
DT1 <8:1>
32
INTERRUPTS <8:1>
SUBTOTAL = 177 SIGNAL BALLS
109
GND
44
VDDINT
22
VDDEXT
IDMA CNTL = IAL, IRD, IWR, IACK
INTERRUPTS = IRQE (PF4), IRQL0(PF5), IRQL1(PF6), IRQ2(PF7)
EMULATOR = EMS, EINT, ELIN, EBR, EBG, ECLK
ELOUT, ERESET
SPORT0A, SPORT 0B
= RFS0, DR0, DT0, SCKL0
SPORT1 = RFS1, TFS1, DR1, SCKL1
NOTE:
1. PWD AND PF3/MODE D ARE TIED HIGH
SUBTOTAL = 175 POWER BALLS
TOTAL = 352 BALLS
Figure 2. ADSP-21mod980N Functional Block Diagram
Every modem processor has:
• A DSP core
• 256K bytes of RAM
• Two serial ports
• An IDMA host.
The signals of each modem processor are accessed through
the external pins of the ADSP-21mod980N. Some signals
are bussed with the signals of the other processors and are
accessed through a single external pin. Other signals remain
separate and they are accessed through separate external
pins for each processor.
The arrangement of the eight modem processors in the
ADSP-21mod980N makes one basic configuration possi-
ble: a slave configuration. In this configuration, the data
pins of all eight processors connect to a single bus structure.
4
6/2001 REV. PrB
Share Link: 